英譯漢基于FPGA的電梯控制器設(shè)計(jì)

1、The design of elevator control system based on FPGA Elevator as a product of modern civilization, in the last century into our lives. Its design is very high speed integrated circuit hardware electronic design automation technology on the base of description language. Six elevator control program de

2、veloped in this language control program development language.Electronic design automation technology is at the end of nineteenth Century and early twenty-first Century emerging technology, function and advantages of powerful is the embodiment of the design in the digital circuit and daily control s

3、ystem. With the rapid development of EDA technology, profound changes have taken place in the electronic system design techniques and tools, the large-scale programmable logic device FPGA, brought a lot of convenience to design personnel. HDL (hardware description language) with programmable logic d

4、evice (PLD) developed, mainly used to describe the structure, behavior, function and interface of digital systems, electronic design automation (EDA) is one of the key technology. It usually adopts the design method of top-down, starting from the overall system requirements for the design.At present

5、, some with FPGA design and implementation of the elevator control system from the magazine to see, the controller algorithm for arbitrary floor can not see in these articles, and the controller algorithm for arbitrary number of layers is the key to ensure the practicability and applicability of the

6、 controller. Therefore, this paper tries to design a N elevator control system using EDA technology, the concrete train of thought is: firstly the elevator controller algorithm, then implemented in hardware verification.1 elevator control systemThe elevator control system usually contains 1 function

7、s: lift, drop, stop; open, closed the elevator door; request signal display, floor display; overload, fault alarm. The overload, fault alarm needs to use the sensor, the control is relatively simple, so we no longer discuss. The elevator controller modeThe Elevator Rise、Decline、StopThe system clockT

8、he door open、closeStopThe floor requestThe Request signal display、StopThe Floor displayStopOverload faultThe Overload, fault report、StopThis paper focuses on the controller algorithm is involved in other functions.The elevator to the first floor of the teaching, the elevator controller implements th

9、e following functions:(1) each layer has a corresponding STop button inside the elevator elevator; outside the top of each layer has a up button, except the first floor each layer is a down button; the up button is pressed the layer are going to rise, the down button is pressed the layer are going t

10、o low layer, the stop button press said the layer someone out of the elevator. For the stop, up, down button, when pressed, the corresponding indicator light, until the request is satisfied, the indicating lamp will destroy;(2) the elevator is running, the indicating lamp rise and fall, stops the co

11、rresponding to light, floor display;(3) the elevator rises, first meet to demand, for low layer or downward demand, will record the demand in the elevator rises, and then in the elevator to meet all the process to meet the demand for elevator down again after the;(4) the elevator drop in the process

12、, first of all to meet the demand for top down, or to the demand, the demand will record in the elevator drop in the process, to meet the process demand and in the elevator down to meet all the elevator to rise again after the.The elevator controller designed in this paper, the basic requirement is

13、to meet the requirements of actual operation of the elevator. The realization of the 2 elevator control system2.1 the overall scheme designThe whole design is composed of four modules, the function of each module is described as follows:A. frequency divider module: This module to achieve an arbitrar

14、y clock frequency input, arbitrary frequency output function, the output frequency precision is 1Hz; module input to the system clock is CLK, the reset signal RST system, output clock frequency. Modules are defined as follows:Module freq_div (reset, CLK, keyclk, liftclk);Module keyclk as the clock b

15、utton, liftclk elevator control clock.B. key request module: This module implements recording and processing on each floor of the up, down and stop button is pressed, module ports are as follows:Key_req (moduleReset, keyclk,Stop, / / elevator within each layer button, each 1 bits represent the 1 lay

16、er, when the corresponding position of the 1 that indicates that the button is pressed;The up / / up, each floor button (top without), each 1 bits represent the 1 layer, when the corresponding position 1 indicates that the up button is pressedDown, / / each floor down button (bottom without), each 1

17、 bits represent the 1 layer, when the corresponding position 1 indicates that the down button is pressed;Stop_r, / / Elevator of each layer in the key informationUp_r, / / Elevator of each layer to key informationDown_r / / Elevator each layer down key information);C. elevator controller module and

18、an indication module: This module according to each layer of the button is pressed, the control of elevator running, and set the indicator lamp. Modules are defined as follows:Lift_cONtrol (moduleKeyclk, / / handle clock buttonLiftclk, / / elevator operation control clockReset, / / reset button to r

19、eset the elevator, the elevator stopped at the floor;Stop_r, / / Elevator of each layer in the key informationUp_r, / / Elevator of each layer to key informationDown_r, / / Elevator each layer down key informationPosition, / / the current floor position, each of the 1 representatives of the 1 layer,

20、 when the corresponding position 1 indicates that the elevator running to the layer;Stoplight, / / internal layers button lights, each 1 bits represent the 1 layer, when the corresponding position of the 1 that indicates the level indicator light;Uplight, / / the top layers of external button lights

21、, each 1 bits represent the 1 layer, when the corresponding position 1 indicates that the layer of up lamp;Downlight, / / in addition to the first layer of each layer of the external button lights, each 1 bits represent the 1 layer, when the corresponding position 1 indicates that the layer of the d

22、own indicator light;Doorlight); / / used to open the door lights, 1 door, 0 doorD. display module: This module is used to display the current elevator location, modules are defined as follows:Module Display (liftclk, position, disp);The 2.2 module design and ImplementationThe frequency divider modul

23、e, key requesting module, elevator controller module and an indication module and display module four module, elevator controller module and an indication module involved in processing various running situations of the lift, the algorithm is the most complex, most error-prone. In this paper, to desi

24、gn the modules by using a finite state machine, the specific algorithm is described as follows.The elevator is defined as the 7 state, the state is defined as follows:S0:onfloor1, said in a floor 1;S1:dooropen_up, the process of rising, elevator door 5s;S2:doorclose_up, the process of rising, the el

25、evator door;S3:up_lift, said the lift up one layer;S4:dooropen_down, drop in the process, the elevator door 5s;S5:doorclose_down, drop in the process, the elevator door;S6:down_lift, indicates that the elevator down one layer.Each state transition in certain conditions, the state transition as shown

26、 in figure 2. Fig. 2 elevator controller state transition diagramTable 1 elevator controller state transition conditionsPresent stateThe next stateThe conversion conditionS0S1The next clockS1S1Uppos=1 or stoppos=1S1S2S1's next state is not S1S2S1Uppos=1 or stoppos=1S2S3S2's next state is not

27、 S1,or stoppos+i or uppos+i or downpos+i (i>0且pos+i<=N)S2S4S2's next state is not S1 and S3 and downpos=1S2S5S2's next state is not S2/S3/S4,and stoppos-i=1 or uppos-i=1 or downpos-i=1 (i>0 and pos-i>=0)S2S2S2's next state is not S1/S3/S4/S5S3S2Finish pos=pos+1,zhe next clock

28、S4S4Downpos=1 or stoppos=1S4S5S4's next state is not S4S5S4Downpos=1 or stoppos=1S5S6S5's next state is notS4 and stoppos-i=1 or uppos-i=1 or downpos-i=1 (i>0 and pos-i>0)S5S1S5's next state is not S4/S6S5S2S5's next state is not S2/S3/S4S5S5S2's next state is not S6/S1/S2I

29、n the table, POS represents the current floor, uppos, downpos, stoppos denote the current floor upward, downward, and stop button state.Obviously, the above algorithm is not to limit the number of floors, that is to say the elevator controller this algorithm is suitable for any floor.2.3 simulationB

30、ased on the above algorithm, using Verilog HDL language to achieve a three elevator controller on FPGA. To achieve it, three layer or multilayer elevator elevator controller is Verilog code number is different, its algorithm is the algorithm proposed in this paper, there is no difference. This paper

31、 only so to achieve a three elevator controller, is because the hardware development environment (including the number of buttons, indicator number) only meet the verification three elevator controller.Simulation waveforms three elevator controller as shown in figure 3. Simulation waveforms 3 three

32、elevator controllerSimulation waveform shows: inside and outside the elevator button, when its value is changed from 0 to 1 that was pressed. In the picture, each floor elevator button and press occurs randomly.The simulation waveform can be seen, the elevator operation in accordance with design req

33、uirements.2.4 hardware verificationIn this paper, the design of the pin lock and downloaded to the hardware development environment, the test is correct.The specific hardware development environment for the GW48-PK2 experiment development system.CLK CLK0, the frequency can be selected for the 256Hz.

34、Keys 1, 2, 3 corresponding to each layer in the elevator button; key 4, 5 corresponding to the one or two floor elevator upward button; key 6, 7 corresponding to the two or three floor elevator down button; key 8 corresponding system reset; lamp 1, 2, 3 instructions in each layer of the elevator but

35、ton press; 4, indicating lamp 5 one or two floor elevator upward button is pressed; lamp 6, 7 indicating that the two or three floor elevator down button is pressed; 8 indicates the door lamp.Where the elevator layers by 1 digital indicator.3 conclusionIn this paper, the design of elevator controlle

36、r, combined with the reality of Shenzhen Institute of Information Technology elevator operation, easy for students to understand and accept, for the teaching reform of work-study combination, is a very good practice project. In addition, the elevator controller algorithm is proposed in this paper is

37、 suitable for any floor, and verified in the FPGA development environment, has very strong adaptability and practicability.基于FPGA的電梯控制器系統(tǒng)設(shè)計(jì)電梯作為現(xiàn)代化的產(chǎn)物，在上個(gè)世紀(jì)就進(jìn)入了我們的生活之中。他的設(shè)計(jì)就是基于電子設(shè)計(jì)自動(dòng)化（Electronic Design Automation）技術(shù)中的甚高速集成電路硬件描述語(yǔ)言（Very High Speed Integrated Circuit Hardware Description Language），用該語(yǔ)言

38、所開發(fā)的六層電梯控制程序。電子設(shè)計(jì)自動(dòng)化技術(shù)是19世紀(jì)末21世紀(jì)初新興的技術(shù)，其在數(shù)字電路設(shè)計(jì)和日常的控制系統(tǒng)中已經(jīng)體現(xiàn)了強(qiáng)大的功能和優(yōu)勢(shì)。隨著EDA技術(shù)的高速發(fā)展， 電子系統(tǒng)設(shè)計(jì)技術(shù)和工具發(fā)生了深刻的變化，大規(guī)模可編程邏輯器件FPGA的出現(xiàn)，給設(shè)計(jì)人員帶來(lái)了諸多的方便。HDL（硬件描述語(yǔ)言）是隨著可編程邏輯器件（PLD）發(fā)展起來(lái)的，主要用于描述數(shù)字系統(tǒng)的結(jié)構(gòu)、行為、功能和接口，是電子設(shè)計(jì)自動(dòng)化（EDA）的關(guān)鍵技術(shù)之一。它通常采用一種自上而下的設(shè)計(jì)方法，即從系統(tǒng)總體要求出發(fā)進(jìn)行設(shè)計(jì)。目前從期刊雜志中看到一些采用FPGA實(shí)現(xiàn)電梯控制系統(tǒng)的設(shè)計(jì)文章，在這些文章中看不到針對(duì)任意樓層的控制器算法，而針

39、對(duì)任意層數(shù)的控制器算法是保證控制器實(shí)用性和適用性的關(guān)鍵。因此，本文嘗試采用EDA技術(shù)來(lái)設(shè)計(jì)一個(gè)N層電梯控制系統(tǒng)，具體思路是：首先給出電梯控制器的算法，然后在硬件平臺(tái)上實(shí)現(xiàn)并驗(yàn)證。1 電梯控制系統(tǒng)要求電梯控制系統(tǒng)通常包含圖1中的功能：電梯升、降、停；電梯門開、關(guān)；請(qǐng)求信號(hào)顯示、樓層顯示；超載、故障報(bào)警。其中超載、故障報(bào)警需要用到傳感器，該控制相對(duì)比較簡(jiǎn)單，因此本文不再展開討論。本文著重討論涉及其他功能的控制器算法。針對(duì)第一教學(xué)樓的電梯，其電梯控制器實(shí)現(xiàn)了以下功能：（1）電梯內(nèi)部每層均有相應(yīng)的STop按鈕；電梯外部除頂層外每層都有up按鈕，除底層外每層都有down按鈕；up按鈕被按下表示該層有人要

40、去高層，down按鈕被按下表示該層有人要去低層，stop按鈕被按下表示該層有人要出電梯。對(duì)于stop、up、down按鈕，當(dāng)被按下后，相應(yīng)的指示燈亮，直到該請(qǐng)求被滿足后，指示燈才滅；（2）電梯運(yùn)行過(guò)程中，上升、下降、停止時(shí)相應(yīng)的指示燈要亮，樓層隨時(shí)顯示；（3）電梯上升過(guò)程中，首先滿足向上的需求，對(duì)于低層或者向下的需求，在電梯上升過(guò)程中會(huì)記錄該需求，然后在電梯向上需求全部滿足后電梯再次下降的過(guò)程中給予滿足；（4）電梯下降過(guò)程中，首先滿足向下的需求，對(duì)于高層或者向上的需求，在電梯下降過(guò)程中會(huì)記錄該需求，然后在電梯向下需求全部滿足后電梯再次上升的過(guò)程中給予滿足。本文設(shè)計(jì)的電梯控制器，其基本要求就是滿

41、足上述實(shí)際運(yùn)行電梯的要求。2 電梯控制系統(tǒng)實(shí)現(xiàn)2.1 整體方案設(shè)計(jì)整體設(shè)計(jì)由四個(gè)模塊組成，各模塊功能具體描述如下：a. 分頻器模塊：該模塊實(shí)現(xiàn)了任意時(shí)鐘頻率輸入，任意頻率輸出的功能，輸出頻率精度為1Hz；模塊輸入為系統(tǒng)工作時(shí)鐘clk，系統(tǒng)復(fù)位信號(hào)rst，輸出為分頻時(shí)鐘。模塊定義如下：module freq_div（reset,clk,keyclk,liftclk）；模塊中keyclk為處理按鍵時(shí)鐘，liftclk為電梯運(yùn)行控制時(shí)鐘。b. 按鍵請(qǐng)求模塊：該模塊實(shí)現(xiàn)了記錄并處理各樓層的up、down和stop按鈕被按下的情況，模塊端口如下：module key_req（reset,keyclk,s

42、top, /電梯間內(nèi)部各層按鈕，每1位代表1層，當(dāng)相應(yīng)位置1時(shí)表示指示該層的按鈕被按下；up, /各樓層up按鈕（頂層無(wú)），每1位代表1層，當(dāng)相應(yīng)位置1時(shí)表示該層up按鈕被按下down, /各樓層down按鈕（底層無(wú)），每1位代表1層，當(dāng)相應(yīng)位置1時(shí)表示該層down按鈕被按下；stop_r, /電梯內(nèi)各層按鍵信息up_r, /電梯外各層向上按鍵信息down_r /電梯外各層向下按鍵信息）；c. 電梯控制器模塊和指示模塊：該模塊根據(jù)各層按鈕被按下的情況，控制電梯運(yùn)行，并設(shè)置指示燈。模塊定義如下：module Lift_cONtrol（keyclk, /處理按鍵時(shí)鐘liftclk, /電梯運(yùn)行控制時(shí)鐘reset, /電梯復(fù)位按鈕，復(fù)位后電梯停在一樓；stop_r, /電梯內(nèi)各層按鍵信息up_r, /電梯外各層向上按鍵信息down_r, /電梯外各層向下按鍵信息position, /當(dāng)前樓層位置，每1位代表1層，當(dāng)相應(yīng)的位置1時(shí)表示電梯運(yùn)行至該層；stoplight, /內(nèi)部各層按鈕指示燈，每1位代表1層，當(dāng)相應(yīng)位置1時(shí)表示指示該層指示燈亮；uplight, /除頂層外各層外部按鈕指示燈，每1位代表1層，當(dāng)相應(yīng)位置1時(shí)表示該層up燈亮；downlight, /除首層外各層外部按