pld應(yīng)用程序舉例

1、pld應(yīng)用程序舉例library ieee;use ieee.std_logic_1164.all; entity duanma isport(fff:out bit_vector(l to 5); aaa:out bit_vector(l to 5); end;architecture kk of duanma is beginffT(l to 5)v=TlllL;aaa(l to 5)v=TinL; end;PLD三個數(shù)加法編程library ieee;use ieee.std_logic_1164.all;entity jw isport(iiil,m2:in integer range

2、 0 to 15; a,b:out st(l_logic_vector(l to 7); end;architecture gg of jw is signal he:integer range 0 to 45;begin he=inl+in2; with he select av=rillll(r when 0110120130140,”0110000” when 1111121131141, riOllOL when 2112122132142, nilOOL when 3113123133143, ”0110011 when 4114124134144, rOllOlL when 511

3、5125135145, rOllin” when 6116126136, “niOOOO” when 7117127137, mini” when 8118128138, nilOn” when 9119129139, ”0000000” when others;with he selectbvJOOOOOOO when 0=he and he=9,else ”0110000” when 10=he and he=19,else1101101* when 20=he and he=29,else4111001 when 30=he and he=39,else”onoon when 40=he

4、 and he=39,else0000000” when others; end;PLD八個按鍵兩個燈library ieee;use ieee.std_logic_1164.all;entity guozi3 isport(ml,m2:in std_logic_vector(l to 4);a，b:oiit std_logic_vector(l to 8); end;architecture gg of guozi3 is beginwith ini select”0110000” when OOOl蔦”1101101” when ”0010”,yinOOL when OIL,”011001

5、1” when 0100蔦yOllOlL when 0101 蔦yOlini” when ”0110”，yilOOOO” when 0111”，TinilL when ”1000蔦 miOlL when lOOl蔦 0000000 when others;with in2 select bVOllOOOCrwheii ”0001 蔦 yiOllOL when ”0010蔦 yinOOL when ”0011 舄 ”0110011” when ”0100 蔦 yOllOlL when ”0101 蔦 yOlini” when ”0110蔦 ”1110000” when ”0111 舄 mnr w

6、hen 1000”， yinoil” when ”1001 舄 0000000 when others;end;PLD順序語句編程(0加到9) library ieee;use ieee.std_logic_1164.all; entity jinchen is port(inlnn stdjogic;a:out std_logic_vector(l to 7);end;architecture gg of jinchen is signal sszinteger range 0 to 9; beginprocess begin wait until ml=T;ss=ss+l;if ss=10

7、 thenss=0;end if; end process; with ss select avinillO when 0,”0110000” when 1, 1101101* when 2, TlllOOL when 3， OllOOn” when 4, TOllOn” when 5, TOllllL when 6，TllOOOO when 7, TllllW when &TlllOlL when 9， ”0000000” when others;end;PLD矢量10個操縱2個數(shù)碼管 library ieee;use ieee.std_logic_1164.all; entity kong

8、zhi2 is port (a:out bit_vector(1 to 7);b:in bit_vector(1 to 10);end; architecture ff of kongzhi2 is begi nwhen bnoOOOOOOOCTelse ”0110000”when b=”(n00000000”else ”11011 errwhen b=”001000000(relsewhen b=*1001000000else” (TH 0011”when b=*10001 OOOOOelsewhen b=*100001 OOOOelsewhen b=*1000001 OOOelse moo

9、oo”when b=*10000001 OOelsewhen b=*1000000010elsewhen b=”1000000001 else ”0000000”；end;PLD晶振SOM操縱數(shù)碼管 library ieee;use ieee.std_logic_1164.all; entity jinzheng is port(in50m:in stdjogic;a:out std_logic_vector(1 to 7); end;architecture gg of jinzheng is signal in1:std_logic;signal ssiinteger range 0 to

10、 9;signal count:integer range 0 to 25000000;begi np rocessbegi nwait until in50m=*r； count=coun t+1;if count=25000000 then countv=0;in1=not in1;end if;end process;p rocess begi n wait until in1=*r； ss=ss+1;if ss=10 then ss=0;end if; end process; with ss selecta=*1111110* when 0, ”0110000” when 1, ”1

11、101101” when 2, ”1111001” when 3, ”0110011” when 4, ”1011011” when 5, ”1011111” when 6, moooo” when 7, 11111ir* when 8, ”1111011” when 9, ”0000000 when others; end;PLD晶振SOM自動跳變程序(0到59) library ieee;use ieee.std_logic_1164.all; entity jiadxx is port(in50m:in stdjogic; a,b:out stdjogic_vector(1 to 7);

12、 end;architecture gg of jiadxx is signal in1:std_logic; signal t,g:integer range 0 to 9;signal count:integer range 0 to 59 25000000;begi np rocessbegi nwait until in50m=*r； count=coun t+1;if count=25000000 then countv=0;in1=not in1;end if;end process;p rocess begi n wait until in1=*r； g=g+i;if g=5 t

13、hen改變變量if g=9 then gv=o； t=t+1;if t=5 thent=0;end if; end if; end process; with g select a=*1111110* when 0,”0110000” when 1, 110110r* when 2, ”1111001” when 3, ”0110011” when 4, ”1011011” when 5, ”1011111” when 6, moooo” when 7, when 8, ”1111011” when 9, ”0000000 when others; with t select bv=mi11(

14、r when 0,”0110000” when 1, ”1101101” when 2, ”1111001” when 3, ”0110011” when 4, ”1011011” when 5,when 6, moooCT when 7,when 8,when 9,”0000000” when others; end;library ieee;use ieee.std_logic_1164.all;entity jiadxx isport(a:out std_logic_vector(1 to 7); b:out std_logic_vector(1 to 3);end;architectu

15、re kk of jiadxx is begina=1111110; 顯示的數(shù) “0” bv二”010”；-顯示的位第6位”end;PLD動態(tài)間隔1秒閃燿 library ieee;use ieee.std_logic_1164.all;entity jiadxx isport(in50m:in stdjogic;b:out std_logic_vector(1 to 3); a:out stdjogic_vector(1 to 7); end;architecture gg of jiadxx is signal count:integer range 0 to 25000000;signa

16、l count_one:integer range 0 to 1; signal one_hz:std_logic;beginp rocess begi n wait until in50m=*r； count=co un t+1;if count=25000000 then countv=0;one_hz=not one_hz;end if;end process;p rocessbeginwait until one_hz=T; coun t_one=co un t_one+1; if count_one=0 then bv=”00(r；else bv=”0(n”； end if;end

17、process;end;PLD動態(tài)顯示0 1library ieee;use ieee.std_logic_1164.all;entity dz1121 is port(in50m:in stdjogic;a:out stdjogic_vector(1 to 7); b:out std_logic_vector(1 to 3);end;architecture gg of ningyi is signal in1:std_logic; signal count_c:integer range 0 to 3; signal count:integer range 0 to 2500; begi

18、n p rocess begi n wait until in50m=*r； countv=co un t+1;if count=2500 then countv=0; in1=not in1;end if;end process;p rocessbegi nwait until in1=*r； count_c=count_c+1;if count c=1 thencount_c=0; end if; end process;with count_c select av=mi11(rwhen 0,” (moooCTwhe n 1, ”O(jiān)OOOOOOwhen others;with count_

19、c select bv=”00(r when 0,”0(rr when 1, when others; end;PLD數(shù)碼管顯示0-7 library ieee;use ieee.std_logic_1164.all;entity xian07 is port(in50m:in stdjogic;a:out stdjogic_vector(1 to 7); b:out std_logic_vector(1 to 3);end;architecture gg of xian07 is signal in1:std_logic; signal count_c:integer range 0 to

20、7; signal count:integer range 0 to 2500; begin p rocess begin wait until in50m=*r； countv=co un t+1;if count=2500 then count=0;in 1=not in1; end if;end process;p rocess begin wait until in1=*r；count_cbu=”000”；一when 1=bu=”001”； abbbu=”100”； ab=*10r*; abu=”110”；when 7=b=*1ir*; av=mooo(r；if count c=7 t

21、hencount_c=0; end if; end case; end process; end;PLD時鐘顯示library ieee;use ieee.std_logic_1164.all; entity shizon is port(in50m: stdjogic;a:out stdjogic_vector( 1 to 7);“段b:out std_logic_vector(1 to 3);-位n Jend;architecture ff of shizon issignal count:integer range 0 to 250;整 數(shù)定義signal count_s:integer

22、 range 0 to 25000;-半秒定義signalg1 ,g2,s1 ,s2,b1 ,b2:std_logic_vector(1 to7)；-變量范疇signal one_hz:std_logic；定義 1 赫茲信 號signal one_s:std_logic;signal x:integer range 0 to 7;-signal gg1 ,gg2,ss1 ,ss2,bb1 ,bb2:integer range 0 to 9;beginp rocess begi n wait until in50m=*r； count=co un t+1;if count=250 then co

23、untv=0;one_hz=not one_hz; end if;end process;p rocess begin wait until in50m=*r； coun t_s=count_s+1; if count_s=25000 then count_s=0;one_s=not one_s; end if;end process;p rocess begin wait until one_hz=T; xbu=”000”； abu=”001”； abb=*0ir*; abu=”100”； abbu=”110”； ab=*1ir*; a=b2;x=0;end case;end process

24、;p rocess begin wait until one_s=T; ggi=ggi+i;if gg1=9 then gg1=0; gg2=gg2+i； if gg2=5 then gg2=0; ss1=ss1+1;if ss1=9 thenss1=0; ss2=ss2+1; if ss2=5 then ss2=0;bb1=bb1+1; if bb1=9 then bb1=0;bb2=bb2+1; end if;if bb1=3 and bb2=2 then bb1=0;bb2=0;end if; end if; end if; end if; end if;end process;with

25、 gg1 select when 0,”0110000” when 1, ”1101101” when 2, 111100r* when 3, ”0110011” when 4, 101101 r* when 5, ”1011111” when 6, 1110000* when 7, when 8, 111101 r* when 9, ”0000000” when others; with gg2 select g2u=mi11(r when 0,”0110000” when 1, 110110r* when 2, ”1111001” when 3, ”0110011” when 4, ”10

26、11011” when 5, 0000000” when others; with ss1 select s1=*1111110* when 0,”0110000” when 1,”1101101” when 2,miO(rr when 3, ”0110011” when 4, 101101 r* when 5, ”1011111” when 6, 1110000* when 7, ”1111111” when 8, 111101 r* when 9, 0000000” when others; with ss2 select s2u=mi11(r when 0,”0110000” when

27、1, ”1101101” when 2, ”1111001” when 3, ”0110011” when 4, 101101 r* when 5, 0000000” when others; with bb1 select b1u=mi11(r when 0,”(TH 0000” when 1, 11011 or* when 2, mio(rr when 3, ”0110011” when 4,”1011011” when 5, when 6, moooo” when 7, when 8, 111101 r* when 9, ”0000000” when others;with bb2 se

28、lect when 0, ” 0110000” when 1, ”1101101” when 2, 0000000 when others; end;PLD單個音符編程低2音 library ieee;use ieee.std_logic_1164.all;entity ypyy is port(in50m:in stdjogic; a:out stdjogic); end;architecture gg of ypyy is signal in1:std_logic;signal count:integer range 0 to 25000000;begi n p rocess begin

29、wait until in50m=*r； countv=co unt+1;if count=85034 then count=0;in1=not in1; end if;end process; a=i n1;END;PLD雙音符編程library ieee;use ieee.std_logic_1164.all;entity ypyy is port(in50m:in stdjogic; a:out stdjogic); end;architecture gg of ypyy is signal in1:std_logic;signal in2:std_logic;signal count:

30、integer range 0 to25000000;signal count_1 :integer range 0 to 25000000;signal ys1s:integer range 0 to50000000;signal jia1:integer range 0 to 1; begi n p rocessbegi nwait until in50m=*r； count=co un t+1;if count=85034 then count=0; in1=not in1; end if;end process;p rocessbegi nwait until in50m=*r； co

31、unt_1 =count_1 +1; if count_1 =63775 then count_1v=0;in2=not in2;end if;end process;p rocess begin wait until in50m=T; ys1s=ys1s+1;if ys18=50000000 then ys1s=0;jia1=jia1+1;end if;if jia1=0 then a=i n1;elseav=in2;end if;end process; end;PLD1-7音符編程(if語句) library ieee;use ieee.std_logic_1164.all;entity

32、 ypyy is port(in50m:in stdjogic; a:out stdjogic); end;architecture gg of ypyy is signal in1:std_logic; signal in2:std_logic; signal in3:std_logic;signal in4:std_logic; signal in5:std_logic; signal in6:std_logic; signal in7:std_logic;signal countzinteger range 0 to 25000000;signal count_1 :integer ra

33、nge 0 to 25000000;signal count_2:integer range 0 to 25000000;signal count_3:integer range 0 to 25000000;signal count_4:integer range 0 to 25000000;signal count_5:integer range 0 to 25000000;signal count_6:integer range 0 to 25000000;signal ys1s:integer range 0 to 50000000;signal jia1:integer range 0 to 7;begin p rocess begin wait until in50m=T; countv=co