實驗十一簡易計算器設(shè)計

裝有ISE的計算機系 1Spartan-III開發(fā) 1無8moduleshift_reg8(clk,moduleshift_reg8(clk,S,s_in,p_in,inputwire[7:0p_in;//outputwire[7:0Qwire[7:0]D;wirenS;FDQ1(.C(clk),.D(D[1]),FDQ2(.C(clk),.D(D[2]),FDQ3(.C(clk),.D(D[3]),FDQ4(.C(clk),.D(D[4]),FDQ5(.C(clk),.D(D[5]),FDQ6(.C(clk),.D(D[6]),FDQ7(.C(clk),.D(D[7]),D1_L(.I0(L_1),.I1(R_1),D2_L(.I0(L_2),.I1(R_2),D3_L(.I0(L_3),.I1(R_3),D4_L(.I0(L_4),.I1(R_4),D5_L(.I0(L_5),.I1(R_5),D6_L(.I0(L_6),.I1(R_6),D7_L(.I0(L_7),.I1(R_7),L1_L(.I0(Q[2]),.I1(nS),L2_L(.I0(Q[3]),.I1(nS),L3_L(.I0(Q[4]),.I1(nS),L4_L(.I0(Q[5]),.I1(nS),L5_L(.I0(Q[6]),.I1(nS),L6_L(.I0(Q[7]),.I1(nS),L7_L(.I0(s_in),.I1(nS),AND2R0_L(.I0(p_in[0]).I1(S).O(R_0))8R1_L(.I0(p_in[1]),.I1(S),R2_L(.I0(p_in[2]),.I1(S),R3_L(.I0(p_in[3]),.I1(S),R4_L(.I0(p_in[4]),.I1(S),R5_L(.I0(p_in[5]),.I1(S),R6_L(.I0(p_in[6]),.I1(S),R7_L(.I0(p_in[7]).I1(S).O(R_7));INVnS_L(.I(S),.O(nS));//反向器module//regclk//clkregS;/S控制串并行（01并行regs_in;/s_inreg[7:0p_in;////wire[7:0QInstantiatetheUnitUnderTest(UUT)shift_reg8uut(//調(diào)用移位寄存器模塊clk=forever#10initial//InitializeS=1;//S初始化為，選擇并行輸入s_in=0;//串行輸入初始化為0，p_in=8'b #100Wait100nsforglobalresettofinish#100;//執(zhí)行并行輸入，將p_in輸入至寄存器S=0;//由并行改變至串行#200;//串行輸入0至所有位數(shù)為0s_in120ns1s_in0#15000s_in=#20000s_in016moduleshift_reg(clk,S,s_in,p_in,inputwire[15:0p_inoutputwire[15:0Q;wirenS;FDFDQ0(.C(clk).D(D[0]).Q(Q[0]))16DFDQ1(.C(clk),.D(D[1]),FDQ2(.C(clk),.D(D[2]),FDQ3(.C(clk),.D(D[3]),FDQ4(.C(clk),.D(D[4]),FDQ5(.C(clk),.D(D[5]),FDQ6(.C(clk),.D(D[6]),FDQ7(.C(clk),.D(D[7]),FDQ8(.C(clk),.D(D[8]),FDQ9(.C(clk),.D(D[9]),FDQ10(.C(clk),.D(D[10]),FDQ11(.C(clk),.D(D[11]),FDQ12(.C(clk),.D(D[12]),FDQ13(.C(clk),.D(D[13]),FDQ14(.C(clk),.D(D[14]),FDQ15(.C(clk),.D(D[15]),OR2D0_L(.I0(L_0I1(R_0O(D[0//1616個觸發(fā)器的輸D1_L(.I0(L_1),.I1(R_1),D2_L(.I0(L_2),.I1(R_2),D3_L(.I0(L_3),.I1(R_3),D4_L(.I0(L_4),.I1(R_4),D5_L(.I0(L_5),.I1(R_5),D6_L(.I0(L_6),.I1(R_6),D7_L(.I0(L_7),.I1(R_7),D8_L(.I0(L_8),.I1(R_8),D9_L(.I0(L_9),.I1(R_9),D10_L(.I0(L_10),.I1(R_10),D11_L(.I0(L_11),.I1(R_11),D12_L(.I0(L_12),.I1(R_12),D13_L(.I0(L_13),.I1(R_13),D14_L(.I0(L_14),.I1(R_14),D15_L(.I0(L_15),.I1(R_15),AND2L0_L(.I0(Q[1]).I1(nS).O(L_0))//16L1_L(.I0(Q[2]),.I1(nS),L2_L(.I0(Q[3]),.I1(nS),L3_L(.I0(Q[4]),.I1(nS),L4_L(.I0(Q[5]),.I1(nS),L5_L(.I0(Q[6]),.I1(nS),L6_L(.I0(Q[7]),.I1(nS),L7_L(.I0(Q[8]),.I1(nS),L8_L(.I0(Q[9]),.I1(nS),L9_L(.I0(Q[10]),.I1(nS),L10_L(.I0(Q[11]),.I1(nS),L11_L(.I0(Q[12]),.I1(nS),L12_L(.I0(Q[13]),.I1(nS),L13_L(.I0(Q[14]),.I1(nS),L14_L(.I0(Q[15]),.I1(nS),L15_L(.I0(s_in),.I1(nS),R1_L(.I0(p_in[1]),.I1(S),R2_L(.I0(p_in[2]),.I1(S),R3_L(.I0(p_in[3]),.I1(S),R4_L(.I0(p_in[4]),.I1(S),R5_L(.I0(p_in[5]),.I1(S),R6_L(.I0(p_in[6]),.I1(S),R7_L(.I0(p_in[7]),.I1(S),R8_L(.I0(p_in[8]),.I1(S),R9_L(.I0(p_in[9]),.I1(S),R10_L(.I0(p_in[10]),.I1(S),R11_L(.I0(p_in[11]),.I1(S),R12_L(.I0(p_in[12]),.I1(S),R13_L(.I0(p_in[13]),.I1(S),R14_L(.I0(p_in[14]),.I1(S),R15_L(.I0(p_in[15]),.I1(S),INVnS_L(.I(S).O(nS));//反向器，用于選擇串并行moduletop(inputwireclk,inputwire[11:0]btn_in,inputwire[13:0]switch,moduletop(inputwireclk,inputwire[11:0]btn_in,inputwire[13:0]switch,outputwire[11:0]anode,outputwire[15:0]segment);[4]switchswitch[9]用于控制串行輸入值（0或1，btn_out[9]為移位和并行置入打入脈沖、reg[15:0]op1,op2;//兩個十六位運算對象reg[15:0] wire[11:0]btn_out;//wire[15:0 wire[15:0]wire[31:0]dis wireclk_1s;wire[15:0]Q1,data_out;//Q1為寄存 initialbegin//運算對象初始化pbdebouncep0(clk,btn_in[0],btn_out[0]);pbdebouncep1(clk,btn_in[1],btn_out[1]);pbdebouncep2(clk,btn_in[2],btn_out[2]);pbdebouncep3(clk,btn_in[3],btn_out[3]);pbdebouncep4(clk,btn_in[4],btn_out[4]);pbdebouncep5(clk,btn_in[5],btn_out[5]);pbdebouncep6(clk,btn_in[6],btn_out[6]);pbdebouncep7(clk,btn_in[7],btn_out[7]);pbdebouncep9(clk,btn_in[9],btn_out[9]);pbdebouncep10(clk,btn_in[10],btn_out[10]);//regpbdebouncep11(clk,btn_in[11],btn_out[11]);//reg ym0(clk,dis y_num,anode[3:0],segment[7:0]);//原16位????? //原16位顯示程序 y32bits calculate_resultm2(switch[3:0],op1op2 m3(clk, couter_16reversibleshift_regm6(btn_out[9],switch[8],switch[9],op1,Q1);//移位寄存器，btn_out[9]為移位和并行置入打入脈沖、switch[8]控制串并行（01并行）；switch[9]用于控制串行輸入值（01，op1作為并行置入值，Q1為寄存器值輸出 alwaysalways@(posedgebtn_out[0])op1[3:0]<=op1[3:0]+always@(posedgebtn_out[1])op1[7:4]<=op1[7:4]+always@(posedgebtn_out[2])op1[11:8]<=op1[11:8]+4'd1;always@(posedgebtn_out[3])op1[15:12]<=op1[15:12]+4'd1;always@(posedgebtn_out[4])op2[3:0]<=op2[3:0]+4'd1;always@(posedgebtn_out[5])op2[7:4]<=op2[7:4]+always@(posedgebtn_out[6])op2[11:8]<=op2[11:8]+always@(posedgebtn_out[7])op2[15:12]<=op2[15:12]+assign //assigndis always@*begincase2'b00:dis y_num=result;//result2'b01:dis y_num=cnt;2'b10: y_num=2'b11:beginif(btn_out[10]==1)y_num=op2;elseNETNET NET"btn_in[0]" NET"btn_in[1]" NET"btn_in[2]" NET"btn_in[3]" NET"btn_in[4]" NET"btn_in[5]" NET"btn_in[6]" NET"btn_in[7]" NET"btn_in[8]" loc="M13";//按鍵8，按下1秒使計數(shù)器加1NET"btn_in[9]" loc="M14";//按鍵9，移位和并行置入打入脈沖NET NET NET"switch[0]"LOC="F12";//開關(guān)閉合時，選擇運算模式"加"NET"switch[1]"LOC="G12";//開關(guān)閉合時，選擇運算模式"減"NET"switch[2]"LOC="H14";//開關(guān)閉合時，選擇運算模式"與"NET"switch[3]"LOC="H13";//開關(guān)閉合時，選擇運算模式"或NET"switch[4]"LOC="J14";//1代表正向計數(shù)，0NET"switch[5]"]"NET"switch[7]"；NET"switch[9]"LOC="F3";//switch[9]用于控制串行輸入值（01）NET"switch[10]"LOC="H4";//用于選擇寄存器NET"switch[11]"LOC="E4";//用于選擇寄存器NET"switch[12]"LOC="G5";//用于選擇寄存器NET"switch[13]"LOC="F4";//用于選擇寄存器NET"anode[0]"LOC="D14";//顯示運算結(jié)果的數(shù)碼管NET"anode[1]"LOC="G14";//顯示運算結(jié)果的數(shù)碼管NET"anode[2]"LOC="F14";//顯示運算結(jié)果的數(shù)碼管NET"anode[3]"LOC="E13";//顯示運算結(jié)果的數(shù)碼管NET"segment[0]"LOC="E14";//對應(yīng)各個數(shù)碼管NET"segment[1]LOC="G13";//對應(yīng)各個數(shù)碼管NET"segment[2]LOC="N15";//對應(yīng)各個數(shù)碼管NET"segment[3]LOC="P15";//對應(yīng)各個數(shù)碼管NET"segment[4]LOC="R16";//對應(yīng)各個數(shù)碼管NET"segment[5]LOC="F13";//對應(yīng)各個數(shù)碼管NET"segment[6]LOC="N16";//對應(yīng)各個數(shù)碼管NET"segment[7]LOC="P16";//對應(yīng)各個數(shù)碼管NET"anode[4]"LOC="B11";//顯示運算對象的數(shù)碼管NET"anode[5]"LOC="A10";//顯示運算對象的數(shù)碼管NET"anode[6]"LOC="B10";//顯示運算對象的數(shù)碼管NET"anode[7]"LOC="A9";//顯示運算對象的數(shù)碼管NET"anode[8]"LOC="A8";//顯示運算對象的數(shù)碼管NET"anode[9]"LOC="B8";//顯示運算對象的數(shù)碼管NET"anode[