第06章 系統(tǒng)控制(時(shí)鐘-振蕩器-看門(mén)狗-PLL)

第6章時(shí)鐘與系統(tǒng)控制1時(shí)鐘和系統(tǒng)控制2振蕩器和鎖相環(huán)3看門(mén)狗電路4低功耗模塊本講內(nèi)容1時(shí)鐘和系統(tǒng)控制2振蕩器和鎖相環(huán)3看門(mén)狗電路4低功耗模塊時(shí)鐘與系統(tǒng)控制時(shí)鐘與系統(tǒng)控制框圖時(shí)鐘與系統(tǒng)控制的寄存器外設(shè)時(shí)鐘控制寄存器

PCLKCR@701ChModuleEnableClockBit0=disable1=enable0reservedreserved1234567EVAENCLKEVBENCLKreservedADCENCLKreservedreservedECANENCLKSPIAENCLKSCIBENCLK89101112131415reservedSCIAENCLKMCBSPENCLKreservedreservedHSPCLKLSPCLK高/低速外設(shè)時(shí)鐘預(yù)定標(biāo)寄存器

HISPCP@701Ah/LOSPCP@701Bh0215-3HSPCLKreservedH/LSPCLK2H/LSPCLK1H/LSPCLK0PeripheralClockFrequency000 SYSCLKOUT/1001 SYSCLKOUT/2(defaultHISPCP)010 SYSCLKOUT/4(defaultLOSPCP)011 SYSCLKOUT/6100 SYSCLKOUT/8101 SYSCLKOUT/10110 SYSCLKOUT/12111 SYSCLKOUT/140215-3LSPCLKreserved1時(shí)鐘和系統(tǒng)控制2振蕩器和鎖相環(huán)3看門(mén)狗電路4低功耗模塊時(shí)鐘與系統(tǒng)控制C28xOsc/PLL時(shí)鐘模塊

PLLCR@7021hDIV3DIV2DIV1DIV0 ClockFrequency(CLKIN)0000 OSCCLKx1/2(noPLL)0001 OSCCLKx1/20010 OSCCLKx2/20011 OSCCLKx3/20100 OSCCLKx4/20101 OSCCLKx5/20110 OSCCLKx6/20111 OSCCLKx7/21000 OSCCLKx8/21001 OSCCLKx9/21010 OSCCLKx10/2PLLCRbits15:4reservedcrystalPLLClockModule4-bitPLLSelectX1/CLKINX2XTALOSCWatchdogModule/2PLLCLKOSCCLK?C28xCoreCLKINMUXXF_XPLLDIS10SYSCLKOUTHISPCPLOSPCPHSPCLKLSPCLK??1、PLL旁路2、PLL使能1時(shí)鐘和系統(tǒng)控制2振蕩器和鎖相環(huán)3看門(mén)狗電路4低功耗模塊時(shí)鐘與系統(tǒng)控制看門(mén)狗模塊如果CPU崩潰，則復(fù)位系統(tǒng)看門(mén)狗計(jì)數(shù)器獨(dú)立于CPU如果計(jì)數(shù)器溢出則復(fù)位或中斷被觸發(fā)為防止計(jì)數(shù)器溢出，CPU必須周期性的向看門(mén)狗WDKEY寄存器寫(xiě)入0X55+0XAA序列在復(fù)位之后(10M外部時(shí)鐘)3ms之內(nèi)看門(mén)狗必須被啟用或者禁止（對(duì)不對(duì)？）看門(mén)狗模塊6-BitFree-RunningCounterCLR/2/4/8/16/32/64OSCCLKSystemReset101100011010001000111110????8-BitWatchdogCounterCLROne-CycleDelayWatchdogResetKeyRegister55+AADetector?GoodKeyBadKey101????//33WDCR.2-0WDCR.6WDPSWDDISWDCR.7WDFLAGWDCNTR.7-0WDKEY.7-0WDCR.5-3WDCHK2-0BadWDCRKey/512OutputPulseWDRSTWDINTSCSR.1WDENINT???SCSR.0WDOVERRIDE看門(mén)狗控制寄存器

WDCR@7029hWDFLAGWDDIS76543210WDCHK1WDCHK0WDPS2WDPS1WDPS0WDCHK2LogicCheckBitsWriteas101orresetimmediatelytriggeredWDPrescaleSelectionBitsWatchdogDisableBit(FunctionsonlyifWDOVERRIDEbitinSCSRisequalto1)reserved15-8 WDFlagBitGetssetwhentheWDcausesaresetWritinga1clearsthisbitWritinga0hasnoeffect看門(mén)狗復(fù)位密鑰寄存器

WDKEY@7025h允許寫(xiě)入的數(shù)值:55h–在AAH之后的寫(xiě)入55使能計(jì)數(shù)器AAh–如果復(fù)位使能則計(jì)數(shù)器清零寫(xiě)入其他任何值將復(fù)位CPU或觸發(fā)WDINT中斷？reservedD776543210D6D5D4D3D2D1D015-8WDKEY寫(xiě)操作SequentialStep1234567891011ValueWrittentoWDKEYAAhAAh55h55h55hAAhAAh55hAAh55h23hResultNoactionNoactionWDcounterenabledforresetonnextAAhwriteWDcounterenabledforresetonnextAAhwriteWDcounterenabledforresetonnextAAhwriteWDcounterisresetNoactionWDcounterenabledforresetonnextAAhwriteWDcounterisresetWDcounterenabledforresetonnextAAhwriteCPUresettriggeredduetoimproperwritevalue系統(tǒng)控制和狀態(tài)寄存器

SCSR@7022hWDOverride(protectbit)AfterRESET-bitgivesuserabilitytodisableWDbysettingWDDISbit=1inWDCR

clearonlybitanddefaultsto1afterreset0=protectsWDfrombeingdisabledbys/w

bitcannotbesetto1bys/w(clear-onlybywriting1)1=(defaultvalue)allowsWDtobedisabledusingWDDISbitinWDCR

oncecleared,bitcannotsetto1bys/w01215-3WDOVERRIDEWDENINTWDINTSreservedWDEnableInterruptWDInterruptStatus(readonly)0=active1=notactive0=WDgeneratesaDSPreset1=WDgeneratesaWDINTinterrupt1時(shí)鐘和系統(tǒng)控制2振蕩器和鎖相環(huán)3看門(mén)狗電路4低功耗模塊時(shí)鐘與系統(tǒng)控制低功耗模式LowPowerModeCPULogicClockPeripheralLogicClockWatchdogClockPLL/OSCNormalRunIDLESTANDBYHALTonoffoffoffononoffoffonononoffonononoff低功耗方式控制0寄存器

LPMCR0@701Eh017-215-8LPM0LPM1QUALSTDBYreservedLowPowerModeEntering1.SetLPMbits2.Enabledesiredexitinterrupt(s)3.ExecuteIDLEinstruction4.ThePowerdownsequenceofthehardwaredependsonLPmodeLowPowerModeSelection00=Idle01=Standby1x=HaltQualifybeforewakingfromSTANDBYmode000000=2OSCCLKs000001=3OSCCLKs111111=65OSCCLKS.........低功耗模式控制1寄存器

LPMCR1@701FhWakedevicefromSTANDBYmode0=disable1=enable0WDINTSCIRXBC2TRIPC5TRIPT3CTRIP123456789101112131415XINT1XNMIT2CTRIPT1CTRIPC3TRIPT4CTRIPC4TRIPC1TRIPC6TRIPSCIRXACANRXAIDLESTANDBYHALTRESETyesyesyesExternalorWakeupInterruptsye