fpga英文.doc

FPGA and other programmable logic ICsFPGA is an integrated circuit that contains many (64 to over 10,000)identical logic cells that can be viewed as standard components.Each logic cell can independently take on any one of alimited set of personalities.The individual cells are interconnected by a matrix of wires and programmableswitches. A users design is implemented by specifying the simple logic function foreach cell and selectively closing the switches in the interconnect matrix.Complex designs are created bycombining these basic blocks to create the desired circuit.Field Programmable means that the FPGAs function is defined by a users program rather than by the manufacturer of the device.Depending on the particular device, the program is either burned inpermanently or semi-permanently as part of a board assembly process, or is loaded from an external memory each time the device is powered up. The FPGA has three major configurable elements: configurable logic blocks (CLBs), input/output blocks, and interconnects. The CLBs provide the functional elements for constructing users logic. The IOBs provide the interface between the package pins and internal signal lines. The programmable interconnect resources provide routing paths to connect the inputs and outputs of the CLBs and IOBs onto the appropriate networks. The Field-Programmable Gate Arrays (FPGAs) provide the benefits of custom CMOS VLSI, while avoiding the intial cost, time delay, and inherent risk of a conventional masked gate array. The FPGAs are customized by loading configuration data into the internal memory cells. Complex Programmable Logic Devices (CPLDs) and Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. There are many different FPGAs with different architectures / processes. There are four main categories of FPGAs currently commerically available: symmetrical array, row-based, hierarchical PLD, and sea-of-gates. In all of these FPGAs the interconnections and how they are programmed vary. Currently there are four technologies in use. They are: static RAM cells, anti-fuse, EPROM transistors, and EEPROM transistors. Depending upon the application, one FPGA technology may have features desirable for that application. Static RAM Technology: In the Static RAM FPGA programmable connections are made using pass-transistors, transmission gates, or multiplexers that are controlled by SRAM cells. This technology allows allows fast in-circuit reconfiguration. The major disadvantage is the size of the chip required by the RAM technology and that the chip configuration needs to be loaded to the chip from some external source (usually external non-volatile memory chip). The FPGA can either actively read its configuration data out of external serial or byte-parallel PROM (master mode), or the configuration data can be written into the FPGA (slave and peripheral mode). The FPGA can be programmed an unlimited number of times. Anti-Fuse Technology: An anti-fuse resides in a high-impedance state; and can be programmed into low impedance or fused state. This technology can be used to make program once devices that are less expensive than the RAM technology. EPROM Technology: This method is the same as used in the EPROM memories. The programming is stored without external storage of configuration. EPROM based programmable chip cannot be re-programmed in-circuit and need to be cleared with UV erasing. EEPROM Technology: This method is the same as used in the EEPROM memories. The programming is stored without external storage of configuration. EEPROM based programmable chips can be electrically erased but generally cannot be re-programmed in-circuit. Many emerging applications in communication, computing and consumer electronics industries demand that their functionality stays flexible after the system has been manufactured. Such flexibility is required in order to cope with changing user requirements, improvements in system features, changing protocol and data-coding standards, demands to support variety of different user applications, etc. . An FPGA has a large number of these cells available to use as building blocks in complex digital circuits. Custom hardware has never been so easy to develop. Like microprocessors, RAM based FPGAs can be infinitely reprogrammed in-circuit in only a fraction of a second. Design revisions, even for a fielded product, can be implemented quickly and painlessly. Taking advantage of reconfiguration can also reduce hardware. Although reconfigurable FPGA technologies have been commercially available for over a decade, the number of available tools capable of supporting reconfigurable system design is still very limited. Many such existing tools are based on conventional static FPGA design flows, and demand expert skills and improvisation in order to produce a working reconfigurable system. Theoretically, FPGAs combine the speed of dedicated, application-optimized hardware with the ability to flexibly change chip resource allocation, so the same system can run many applications, optimized for each one. But FPGAs have historically been so hard to program that its been very hard and expensive to use these advantages. FPGA linksInformation on Field Programmable Gate Array chips and related techniques. General information Creating quasistatic, parameterized FPGA designs - New configuration approaches can lead to easier system designs, benefiting a range of applications. Reducing the overall pin count, interface complexity, and resource usage also enables FPGAs to be a flexible digital-signal-processing alternative to DSP architectures. Rate this link EDA tools bridge the system-on-programmable-chip design gap - Once relegated to low-cost, low-capability products, EDA tools for PLD development are becoming more complex to keep up with the increased capacity of the devices. Rate this link EDN Programmable-logic directory - The second annual EDN PLD directory highlights the architectures available for your next design. Find out whats new, whats obsolete, and whats evolved in PALs, PLDs, and FPGAs. Rate this link Field-programmable devices - field-programmable devices come in a variety of fruity flavors, and more are arriving all the time Rate this link FPGA Basics Rate this link MRCI FPGA - MRCI maintains one of the most extensive databases on informaion pertaining to FPGAs or Field Programmable Gate Arrays. Rate this link FPGAs: a matter of cores - portable logic blocks, or cores, have become an accepted part of ASIC design but using cores in FPGAs presents a new set of challenges Rate this link FPGAs and ASICs - This web site is dedicated to the design and use of programmable and quick-turn technologies for space flight applications Rate this link FPGAs - Does the performance-power-price product of your software-centric approach no longer compute? Do you need a nimbler platform than a hard-wired ASIC can provide? Programmable logic may be your answer, but carefully calculate the trade-offs to correctly solve your problem. Rate this link New FPGA Program Techniques Kick But - Theoretically, FPGAs combine the speed of dedicated, application-optimized hardware with the ability to flexibly change chip resource allocation, so the same system can run many applications, optimized for each one. But FPGAs have historically been so hard to program that its been very hard and expensive to use these advantages. New tools will help this. Rate this link PLD-design methods migrate existing designs to high-capacity devices - moving to newer higher capacity programmable devices can give you higher density and better performance Rate this link Programmable logic: Beat the heat on power consumption - Higher performanceand gate countsincrease programmable-logic powerconsumption. Wise device selection and design techniques can significantly improve your chances of coming in under the powerbudget. Rate this link Programmable Logic Devices / Programowalne uk.ady logiczne - The site is about programmable logic devices.The site has many links to sites in English and Polish about PLD. Rate this link Reconfigurable logic: built-in adaptability - A design based on reconfigurable logic offers both hardware speed and software flexibility. Whats it like to design with reconfigurable logic? In this EDN hands-on design project, we find out. Rate this link Reconfigurable logic: hardware speed with software flexibility - reconfigurable logic lets you dynamically alter hardware in real time, blurring the boundary between hardware and software Rate this link Tutorials for Xilinx and Altera programmable logic with schematic entry and Verilog Rate this link EDA tools for FPGAs break down the complexity gridlock - FPGA devices offer execution speed and gate capacity that rivals many ASIC implementations and fosters the growth of EDA tools in that market. Rate this link Resource pageso GHDL - GHDL is a VHDL simulator, using the GCC technology. GHDL implements the VHDL language according to the IEEE 1076-1987 or the IEEE 1076-1993 standard. GHDL compiles VHDL files and creates a binary which simulates (or executes) your design. GHDL does not do synthesis: it cannot translate your design into a netlist. Rate this link o EDNs Third Annual Programmable-Logic Directory - EDNs PAL, PLD, and FPGA directory highlights the architectures available for your next design. Find out whats new, whats obsolete, and whats evolved in PALs, PLDs, and FPGAs. Rate this link o fpga4fun - HDL tutorials and designs to promote the use of FPGAs Rate this link o Emacs Modes for Hardware Languages - This page provides links to existing Emacs modes for languages used in hardware design. Rate this link o O - This is a good site containing free (GPL) tested Verilog/VHDL models. Rate this link o SOCworks - Site to explore and simulate your System-On-Chip (SOC) ideas and architectures using real vendor IP. Rate this link o Programmable-logic directory - EDNs fourth annual programmable-logic directory highlights the architectures available for your next design. Find out whats new, whats obsolete, and whats evolved in PALs, PLDs, FPGAs, and ASIC/FPGA hybrids. Rate this link Design tipsComplex Programmable Logic Devices (CPLDs) and Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. There are many different FPGAs with different architectures / processes. The standard digital design flow for FPGA programming: o Design Entry: In the Digital Design Stage the digital design is created with a schematic digital design editor or a Hardware Description Language (HDL). o Design Implementation: In the Design Implementation stage, the netlist produced by the design entry program is converted into the bitstream file which configures the FPGA. The first step Maps the design onto the FPGA resources;. The second step Places or assigns logic blocks created in the mapping process in specific locations in the FPGA. The third step Routes the interconnect paths between the logic blocks. The output is a Logic Cell Array File (LCA) for the particular FPGA. This LCA file than then converted into a bitstream file for configuring the FPGA. o Design Verification: The Design Verification Step tests the designs logic and timing using input stimuli. Various CAE software packages provide verification/simulation tools. In-circuit verification is another way to test the design. o FPGA Confguration: Configuration is a process in which the circuit design (bitstream file) is downloaded into the FPGA. Through this method the FPGA is configured from within an application program.FPGA designers using the most up-to-date devices must solve a number of new problems, including the inability to achieve performance requirements, unpredictable routing results, routing congestion, tightly packed designs, critical paths spanning various levels of hierarchy, and heavily constrained interconnect wires. FPGA designers have had to solve them using expensive design iterations or using suitable extra design software. General Bringing Parallel Processing to FPGA Designs Rate this link CPLDs readily replace precious ?P resources - using CPLDs to offload your CPU lets you create a device that hits an effective performance and cost balance between the conflicting attributes of standard and custom parts Rate this link Detailed model shows FPGAs true costs - an analysis of all the variables affecting IC development shows that FPGAs are extremely cost-effective at surprisingly high production volumes Rate this link FPGA makes simple FIFO - FPGA-based, synchronous FIFO that uses the same clock for read and write operations Rate this link Introduction to Xilinx Virtex FPGA devices tool - Slide set Rate this link Moving beyond programmable logic: if, when, how? - decision to migrate from PLDs and FPGAs to lower cost ASICs seems easy at first glance but may be more complicated than you think, do a little research and analysis before you proceed, and carefully choose which migration path to follow Rate this link Navigating Through FPGA Designs - The FPGA design process is not as seamless as one might like. However, powerful synthesis, simulation, and programming tools are here to help. Rate this link Navigating Through FPGA Design - FPGA design process is not as seamless as one might like Rate this link PLD code reveals pc-board revisions - The PLD code described in this article implements a pc-board-level revision-detection system that detects whether PLD pins are shorted together on a pc board. It is often advantageous to field a single PLD programming file that works for several generations of physical hardware. The PLD needs to understand what the board revision is, so that it can enable or disable functions, pins, or both to external circuitry. Rate this link Sequence Control using Programmable Logic - A conceptual level approach, available in modern design tools is used to simplify the task. Rate this link The best (or worst?) of both worlds - Programmable-logic devices deliver design, manufacturing, and after-sale-service flexibility that ASICs cant match, but CPLDs and FPGAs also run more slowly, burn more power, and cost more per gate, there is emerging one-chip ASIC/programmable-logic hybrid solutions Rate this link Your core, my design, our problem - Integrating third-party cores into a design requires more than just reading a data sheet. Virtual components can greatly enhance design productivity or doom a project to failure, and many factors determine the final outcome. To ensure success, the core provider must become a trusted member of the design team. Rate this link Arimethics using FPGAs A Survey of CORDIC Algorithms for FPGAs - this paper describes the CORDIC algorithm in laymans terms, and discusses implementation issues specific to FPGAs, working copy in pdf format Rate this link Distributed Arithmetic - powerful technique for reducing the size of a parallel hardware multiply-accumulate that is well suited to FPGA designs Rate this link Multiplication in FPGAs - multiplication is basically a shift add operation, but there are variations how to do it, this document is a brief tutorial on multiplication hardware Rate this link The CORDIC Algorithm - class of shift-add algorithms for rotating vectors in a plane Rate this link Counters PLD code creates PWM generators - This PLD (programmable-logic-device) code creates arbitrary-resolution, pulse-width-modulated (PWM) generators. PWM generators are useful as low-bandwidth D/A converters in hardware of microprocessor-based systems. When you pass it through a simple RC lowpass filter, a PWM waveform becomes a voltage thats approximately equal to the PWM duty cycle times the supply voltage. This code is written for Alteras devices, but you can quite easily translate the design structure and flow into VHDL or Verilog. Rate this link Preprocessor for rotary encoder uses PAL - Rotary encoders usually provide quadrature pulses that indicate both the amount of rotation and the direction. This application idea helps keeping accurate track of rotary encoder position. Rate this link XAPP052: Efficient Shift Registers, LFSR Counters and Long Pseudo-Random Sequence Generators - FPGA application note from Xilinx in pdf format Rate this link Oscillator VCO uses programmable logic - A VCO (voltage-controlled oscillator) is an analog circuit, so you cannot find it in the libraries for the design of digital programmable chips. When you need such a circuit for synchronization or clock multiplication, you need to find a circuit that works with the standard digital functions, such as AND and NAND. Several possibilities exist for building variable-frequency oscillators. This design modifies a two-NOR-gate RC oscillator to function as a VCO. Rate this link Signal processing using FPGAsDigital signal processing has traditionally been done using enhanced microprocessors but recent increases in Field Programmable Gate Array performance and size offer a new hardware acceleration opportunity. A Dynamic Hardware Video Processing Platform - paper examines use of an FPGA as the processing element in a video processing system, pdf format Rate this link DSP design tools target FPGAs - fast DSP algorithms demand a hardware implementation Rate this link DSP woth FPGAs - nice tutorial document collection Rate this link Fastand flexible: FIR filters in reconfigurable logic - reconfigurable logic lets you implement DSP functions in hardware, providing a mix of speed and design flexibility