北郵數(shù)字邏輯課程設(shè)計(jì)

內(nèi)容概要●

簡易電子琴●

簡易頻率計(jì)●

交通燈控制●

電子鐘顯示課程設(shè)計(jì)實(shí)驗(yàn)指導(dǎo)●

藥片裝瓶系統(tǒng)知識(shí)準(zhǔn)備●

主樓720實(shí)驗(yàn)室●

60臺(tái)實(shí)驗(yàn)儀●

四人一組（限定每班7組）實(shí)驗(yàn)環(huán)境●

復(fù)習(xí)《數(shù)字邏輯與數(shù)字系統(tǒng)》第五章在系統(tǒng)編程技術(shù)●圖書館借閱《VHDL數(shù)字電路設(shè)計(jì)與應(yīng)用實(shí)踐教程》或硬件描述語言類書籍知識(shí)準(zhǔn)備實(shí)驗(yàn)要求實(shí)驗(yàn)要求●熟練掌握ispEXPERT軟件的使用方法●熟練掌握isp器件的使用方法●熟練掌握用VHDL進(jìn)行數(shù)字邏輯電路設(shè)計(jì)●認(rèn)真寫出課程設(shè)計(jì)報(bào)告●熟練掌握isp器件的下載方法●7月7日~7月17日在實(shí)驗(yàn)室完成四個(gè)實(shí)驗(yàn)Multimedia1032管腳定義I/O單元全局布線通用邏輯單元輸出布線I/O單元輸入信號(hào)→→→→→輸出信號(hào)信號(hào)流程→模16計(jì)數(shù)器設(shè)計(jì)四位二進(jìn)制計(jì)數(shù)器74LS163演示_WEB74LS163（模16）ispLSI1032復(fù)位時(shí)鐘信號(hào)K2K1模16計(jì)數(shù)器VHDL語言用VHDL語言設(shè)計(jì)四位二進(jìn)制計(jì)數(shù)器（模16）LIBRARYieee;USEieee.std_logic_1164.all;ENTITYexample1IS

PORT(x1,x2,x3 :IN BIT; f:OUTBIT);ENDexample1;ARCHITECTURELogicFuncOFexample1IS

BEGIN

f<=(x1ANDx2)OR(NOTx2ANDx3);ENDLogicFunc;VHDL語言結(jié)構(gòu)

可編程邏輯的VHDL文本設(shè)計(jì)方式●

VHDL語言結(jié)構(gòu)庫實(shí)體結(jié)構(gòu)體每個(gè)部分通過關(guān)鍵字引導(dǎo)出來描述邏輯功能引用庫中程序包x3x1x2fVHDL結(jié)構(gòu)VHDL語言結(jié)構(gòu)組成庫程序包實(shí)體結(jié)構(gòu)體配置存放已編譯的實(shí)體、結(jié)構(gòu)體、程序包和配置存放各種設(shè)計(jì)模塊能共享的數(shù)據(jù)類型、常數(shù)、程序等描述所設(shè)計(jì)硬件系統(tǒng)的外部接口信號(hào)描述所設(shè)計(jì)硬件系統(tǒng)的內(nèi)部結(jié)構(gòu)和功能用來從庫中選取所需單元來組成新系統(tǒng)實(shí)體說明、結(jié)構(gòu)體格式ENTITY<實(shí)體名>IS

[類屬參數(shù)說明

]；

[端口說明部分

]；

[實(shí)體說明部分]；END<實(shí)體名>;ARCHITECTURE<結(jié)構(gòu)體名>

OF

<實(shí)體名>IS

[結(jié)構(gòu)體說明部分]；BEGIN

<并行處理語句>

；END

<結(jié)構(gòu)體名>;實(shí)體說明格式結(jié)構(gòu)體格式ENTITYhalf_adderIS

PORT(A,B:INstd_logic;Co:OUTstd_logic;S:OUTstd_logic);ENDhalf_adder;ARCHITECTURErtlOFhalf_adderISSIGNALtmp1,tmp2:std_logic;BEGIN tmp1<=AORB; tmp2<=ANANDB; Co<=NOTtmp2; S<=tmp1ANDtmp2;ENDrtl;端口說明部分ABSCOABSCotmp1tmp2實(shí)體名一致實(shí)體說明、結(jié)構(gòu)體格式ENTITYhalf_adderIS

PORT(A,B:INstd_logic;Co:OUTstd_logic;S:OUTstd_logic);ENDhalf_adder;ARCHITECTURErtlOFhalf_adderIS

BEGIN S<=AXORB; Co<=AANDB;ENDrtl;ABSCOΣABSCo0000011010101101ABSCo半加器LIBRARYieee;USEieee.std_logic_1164.all;LIBRARYIEEE;USEIEEE.std_logic_1164.ALL;USEIEEE.std_logic_arith.ALL;USEIEEE.std_logic_unsigned.ALL;ENTITYcounterIS

PORT(clk,areset,sset,enable:INstd_logic;cout:OUTstd_logic;q:BUFFERstd_logic_vector(3DOWNTO0));ENDcounter;ARCHITECTURErtl_arcOFcounterISBEGIN

PROCESS(clk,areset)

BEGIN

IF(areset='1')THENq<='0';

ELSIF(clk'eventANDclk='1')THEN

IF(sset='1')THENq<="1010";ELSIF(enable='1')THENq<=q+1;

ELSEq<=q;

ENDIF;

ENDIF;

ENDPROCESS;cout<='1'WHENq="1111"ANDenable='1'

ELSE'0';ENDrtl_arc;計(jì)數(shù)器的描述1同步預(yù)置為“1010”四位二進(jìn)制同步計(jì)數(shù)器RQ0aresetENq0clkCLKenableSssetCOQ1Q2Q3q1q2q3coutRSENCLKq3q2q1q01×××000001×上升預(yù)置值001上升計(jì)數(shù)值加1000×保持不變標(biāo)準(zhǔn)無符號(hào)類型程序包仿真波形counter16.vhd實(shí)驗(yàn)一簡易電子琴1234567iispLSI1032音符(C)1234567i頻率(Hz)262294330349392440494523輸入的主頻=100KHz不同的鍵對(duì)100KHz進(jìn)行分頻K0K1K2K3K4K5K6K7設(shè)計(jì)思想多模計(jì)數(shù)器二分頻計(jì)數(shù)器判斷當(dāng)前按鍵是否有效時(shí)鐘信號(hào)實(shí)驗(yàn)一頂層多模計(jì)數(shù)器二分頻計(jì)數(shù)器音符(C)1234567i頻率(Hz)262294330349392440494523模381340303286255227202191提高音量使輸出信號(hào)占空比為50%多模計(jì)數(shù)器輸出波形：音符(C)1234567i模19117015114312811410197libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitytoneisPort(index:instd_logic_vector(7downto0);--音符輸入信號(hào)code:outstd_logic_vector(6downto0);--音符顯示信號(hào)high:outstd_logic;--高低音顯示信號(hào)tone0:outintegerrange0to2047);--音符的分頻系數(shù)endtone;architectureBehavioraloftoneisbeginsearch:process(index)--此進(jìn)程完成音符到音符的分頻系數(shù)譯碼，音符的顯示，高低音階begincaseindexiswhen"00000001"=>tone0<=773;code<="1001111";high<='1';when"00000010"=>tone0<=912;code<="0010010";high<='1';when"00000100"=>tone0<=1036;code<="0000110";high<='1';when"00001000"=>tone0<=1116;code<="1001100";high<='1';when"00010000"=>tone0<=1197;code<="0100100";high<='1';when"00100000"=>tone0<=1290;code<="0100000";high<='0';when"01000000"=>tone0<=1372;code<="0001111";high<='0';when"10000000"=>tone0<=1410;code<="0000000";high<='0';whenothers=>tone0<=2047;code<="0000001";high<='0';endcase;endprocess;endBehavioral;音階發(fā)生器程序參見VHDL電子琴1實(shí)驗(yàn)一程序模塊實(shí)驗(yàn)二簡易頻率計(jì)ispLSI10321~1MHz待測(cè)信號(hào)檢測(cè)開始時(shí)鐘基準(zhǔn)信號(hào)100KHz1S的閘門信號(hào)內(nèi)計(jì)數(shù)的結(jié)果就是被測(cè)信號(hào)的頻率設(shè)計(jì)思想gate=1對(duì)被測(cè)信號(hào)進(jìn)行十進(jìn)制計(jì)數(shù)gate=0顯示計(jì)數(shù)結(jié)果產(chǎn)生閘門信號(hào)及清零信號(hào)1S的閘門信號(hào)的產(chǎn)生方法：對(duì)100kHz時(shí)鐘計(jì)數(shù)，當(dāng)計(jì)滿99999時(shí)產(chǎn)生輸出信號(hào)，再經(jīng)2分頻后產(chǎn)生占空比50%的方波信號(hào)。1S1S計(jì)數(shù)顯示實(shí)驗(yàn)三交通燈控制ispLSI1032緊急情況控制復(fù)位時(shí)鐘信號(hào)1KHz設(shè)計(jì)思想六個(gè)時(shí)序狀態(tài)1、初始四個(gè)方向的紅燈全亮。延時(shí)1秒。2、東西方向綠燈亮，南北方向紅燈亮。延時(shí)5秒。3、東西方向黃燈閃，南北方向紅燈亮。延時(shí)2秒。4、東西方向紅燈亮，南北方向綠燈亮。延時(shí)5秒。5、東西方向紅燈閃，南北方向黃燈閃。延時(shí)2秒。6、返回2，繼續(xù)運(yùn)行。7、緊急情況時(shí)手動(dòng)控制四個(gè)方向紅燈全亮。之后返回打斷時(shí)的狀態(tài)繼續(xù)。四個(gè)計(jì)數(shù)器：1秒、2秒、5秒、0.2秒?！獭獭獭獭獭?實(shí)驗(yàn)三六個(gè)時(shí)序狀態(tài)1秒計(jì)數(shù)器計(jì)數(shù)啟動(dòng)/復(fù)位1秒計(jì)數(shù)器復(fù)位并停止計(jì)數(shù)5秒計(jì)數(shù)器開始計(jì)數(shù)1秒后5秒計(jì)數(shù)器復(fù)位并停止計(jì)數(shù)2秒計(jì)數(shù)器開始計(jì)數(shù)提供閃爍信號(hào)5秒后2秒計(jì)數(shù)器復(fù)位并停止計(jì)數(shù)5秒計(jì)數(shù)器開始計(jì)數(shù)2秒后5秒計(jì)數(shù)器復(fù)位并停止計(jì)數(shù)2秒計(jì)數(shù)器開始計(jì)數(shù)提供閃爍信號(hào)5秒后2秒后S0S1S2S3S4S5所有計(jì)數(shù)器停止計(jì)數(shù)上一狀態(tài)保留緊急情況按鈕按下有限狀態(tài)機(jī)描述單進(jìn)程描述狀態(tài)機(jī)ARCHITECTUREstate_machineOFstore_controllerIS

TYPEstate_typeIS(idle,decision,read,write);

SIGNALstate:state_type;BEGINone_process:PROCESS(clk)

BEGIN

IF(clk'eventANDclk='1')THEN

CASEstateIS

WHENidle=>IF(ready='1')THENstate<=decision;

ELSEstate<=idle;

ENDIF;

WHENdecision=>IF(read_write='1')THENstate<=read;

ELSEstate<=write;

ENDIF;

WHENread=>IF(ready='1')THENstate<=idle;

ELSEstate<=read;

ENDIF;

WHENwrite=>IF(ready='1')THENstate<=idle;

ELSEstate<=write;

ENDIF;

ENDCASE;

ENDIF;

ENDPROCESS;re<='1'WHENstate=readELSE'0';we<='1'WHENstate=writeELSE'0';ENDstate_machine;LIBRARYIEEE;USEIEEE.std_logic_1164.ALL;ENTITYstore_controllerISPORT(readyclkread_write:INstd_logic; we,re:OUTstd_logic);ENDstore_controller;readwritedecisionidlereadyreadyreadyreadyread_writeread_writereadyready存儲(chǔ)控制器狀態(tài)轉(zhuǎn)移圖用戶自定義數(shù)據(jù)類型單進(jìn)程狀態(tài)機(jī)輸出信號(hào)實(shí)驗(yàn)四ispLSI1032時(shí)鐘信號(hào)1KHz電子鐘顯示設(shè)計(jì)思想頂層模塊(