文稿教程教案devices

1、Chapter 3 THE DEVICES The MOSFET13.1 Structure and Operation of MOS Transistor3.2 Threshold Voltage of MOS Transistor 3.3 First-Order Current-Voltage Characteristic 3.4 The Actual MOS TransistorSome Secondary Effects3.5 Dynamic BehaviorGoal of this chapterPresent intuitive understanding of device op

2、erationIntroduction of basic device equationsIntroduction of models for manual analysisIntroduction of models for SPICE simulationAnalysis of secondary and deep-sub-micron effectsFuture trends33.1 Introduction MOS technology is the basis for most of the very large scale integrated circuits. It is th

3、e dominant technology in the IC industry today, with bipolar technology a distant second, and consequently, MOS VLSI circuits make up a dominant percentage of the total market for digital ICs. We will spend much of this chapter examining basic physics and modeling of MOS transistors. The emphasis is

4、 on the specific characteristics of MOS devices that are important to VLSI digital circuit design, including the threshold voltage equation, current equations, and capacitance models. This chapter focused on the semiconductor devices used in mainstream integrated circuits. MOS devices, pn junctions,

5、 and dynamic behavior of devices are covered. 3.2 Structure and Operation(原理) of the MOS TransistorStructure and Operation of the MOS TransistorDifferent Types of MOS Transistors4n+SourceDrainp substrateBulk (Body)p+ stopperField-Oxide(SiO2)n+LWGate oxidePolysilicon Gate5The MOS TransistorThe two n+

6、 areas/regions in the p-type substrate are called the source and drain.MOS(FET): metaloxidesemiconductorMOS transistor A four-terminal device6The source and the drain are the electrodes conducting the current. The gate electrode is the controlling terminal. The function of the body is secondary.The

7、voltage applied to the gate terminal determines if and how much current flows between the source and the drain ports.The body represents the fourth terminal of the transistor. It only serves to modulate the device characteristics and parameters. MOS transistors are actually four-terminal devices:Ver

8、tical Structure of MOS transistorgate electrode, insulator, semiconductor substrate7Consists of three layers:Horizontal Structure of MOS transistorsource region, channel region, drain regionWorking area8Consists of three regions :Important Dimensions of MOS TransistortoxChannel width W W is the late

9、ral extent(橫向距離) of the channel, depending on the desired current-handling capability.Channel length L key feature L is the effective gate width. It is the separation distance between the drain and source diffusion regions. Channel length is the most important horizontal dimension.9 Characteristic p

10、arameters of an MOS transistor include: 0.25 micron transistor (Bell Labs)polysource/draingate oxideL10N+N+L(drawn)Function of Two-terminal MOS Structure As a two-terminal device, MOS structure forms a parallel-plate capacitor(平板電容): gatesubstrateSiO2toxVg+- The gate and the substrate act as the two

11、 electrodes (plates) and the oxide layer acts as the dielectric(電介質(zhì)). The source and drain diffusion regions are omitted.11Parallel plate capacitanceFormula for parallel plate capacitanceCg =Cox WL= (ox / tox)WLPermittivity(介電常數(shù)) of oxide ox = 3.46 x 10-13 F/cm2Gate capacitance(柵電容) Cg helps determi

12、ne charge in channel which forms inversion region.1213As a four-terminal device, the MOS transistor can be considered to be a voltage-controlled switch; GSD There are two operating modes for this transistor: on and off. We must use the four terminals provided on the device to place it in these two p

13、ossible conditions.Function of Four-terminal MOS Structure The MOS transistor has e the most widely used switching device in LSI and VLSI circuits. G14Function of Four-terminal MOS Structure (cont.) |VGS|GSDG When the gate voltage is lower than the threshold, no such channel exists, and the switch i

14、s considered off (open).15Types of MOS TransistorsAccording to the type of charge carrier (電荷載流子):n-channel MOSFET (NMOS) p-channel MOSFET (PMOS)According to the mode of operation (工作模式):Enhancement-type (增強(qiáng)型) MOSFETDepletion-type (耗盡型) MOSFETN-channel MOS (NMOS) Transistor16 p-type substrate, n+ so

15、urce and drain regions, n-type channel region; Electrons are the majority carriers. The current is carried byelectrons moving through an n-type channel from drain to source.P-channel MOS (PMOS) Transistor17 n-type substrate, p+ source and drain regions, p-type channel region; Holes are the majority

16、carriers. The current is carried byholes moving through an p-type channel from source to drain. The conducting carriers in NMOS transistor and PMOS transistor are different, therefor the directions of their electrical flows are opposite, and the polarity of the terminal voltage is opposite.Switch Mo

17、del of NMOS TransistorGateSourceDrain| VGS | VGS = VT Closed (on)RonGate = 1SourceDrain18Switch Model of PMOS TransistorGateSourceDrain| VGS | VGS VT Open (off)Gate = 1SourceDrain VGS = VTClosed (on)RonGate = 0SourceDrain1920Enhancement-type (增強(qiáng)型) MOSFETEnhancement-type vs. Depletion-type NMOS and P

18、MOS transistors have no conducting channel at zero gate-source voltage. The enhancement-mode device is always off at zero gate bias, so it is also called normally-off transistor (常斷器件).Depletion-type (耗盡型) MOSFET In NMOS and PMOS transistors the conducting channels already exist at zero gate-source

19、voltage. The depletion-mode device is always on at zero gate bias, so it is also called normally-on transistor (常通器件).MOS Transistors -Types and SymbolsDSGGSDNMOSEnhancementPMOSEnhancementEnhancement-mode devices NMOS devices have positive thresholds and terminal voltages. PMOS devices have negative

20、 thresholds and terminal voltages.NMOSDepletionDSGDSGBNMOS withBulk Contact21Depletion-mode devices NMOS devices have negative thresholds and terminal voltages. PMOS devices have positive thresholds and terminal voltages.22The abbreviations used for the device terminals are: G for the gate, D for th

21、e drain, S for the source, and B for the substrate.Terminals of MOS DevicesBy convention, all terminal voltages(端電壓) of the device are defined with respect to the source potential. 23Terminals of MOS Devices (cont.)In NMOS devices, the source is defined as the n+ region which has a lower potential(電

22、勢) than the other n+ region, the drain. The source is the terminal with the higher potential in PMOS devices.The body is generally connected to a DC supply that is identical for all devices of the same type (GND for NMOS, VDD for PMOS). 24Terminal Connection of NMOS TransistorTransistor Switch Model

23、NFET or n transistoron when gate Hgood switch for logic Lpoor switch for logic Hpull-down devicePFET or p transistoron when gate Lgood switch for logic Hpoor switch for logic Lpull-up device26Control the current conduction between the source and the drain, using the electric field generated by the g

24、ate voltage as a control variable. Simple operation principle of MOS DeviceAnd the current flow in the channel is also controlled by the drain-to-source voltage and by the substrate voltage. So the current can be considered a function of these external terminal voltages.NMOS Operation : Cutoff (截止)U

25、nder zero bias, two back-to-back pn-junctions create a very high resistive path between source and drain. There is no charge on the gate and no surface charge in the silicon.27NMOS Operation : Depletion (耗盡) Gate and body form the MOS capacitor. A depletion region is formed below the gate, but there

26、 is no current between the source and drain.28For small gate voltage levels, the majority carriers (holes) are repelled(排斥) back into the substrate, and a negative charge is induced in the semiconductor surface. The surface of the p-type substrate is depleted.NMOS Operation : Inversion (反型) 29 No cu

27、rrent flows in this channel if there is no voltage difference between the drain and source terminals.NMOS Operation : Inversion (cont.)30This channel provides an electrical connection between the two n+ regions, and it allows current flow, as long as there is a potential difference between the sourc

28、e and the drain terminal voltages.Field Effect in the Semiconductor Surfacep-type semiconductor： Accumulation2. The majority carriers are decreasing.3. A depletion region is formed.4. The inversion layer is formed.32Operating Modes of NMOS Device= 0 The holes are accumulated in the surface of silico

29、n.3.3 Threshold Voltage of the MOS Transistor 33Main components of the threshold voltagePhysical parameters affecting the threshold voltage Threshold Voltage (閾值電壓) Concept34SDp substrateBG VGS + - n+n+depletion regionn channel Further increases in the gate voltage increases the concentration of the

30、 mobile carriers in the channel until the concentration of electrons at the surface equals the concentration of holes in the substrate, a condition known as strong inversion. It is a critical value that the potential at the silicon surface reaches at some point, where the semiconductor surface inver

31、ts to n-type material . The value of the gate-to-source voltage needed to cause surface strong inversion is called the threshold voltage and devoted .Components of Threshold Voltage35 There are four terms:The work function difference (功函數(shù)差) between the gate and channel : This term reflects the built

32、-in potential (內(nèi)建電勢) of the MOS system, which consists of the substrate, the thin silicon dioxide layer, and the gate electrode. It accounts for (代表) part of the voltage drop across the MOS system that is built-in.The gate voltage component to change the surface potential (表面電勢) : The externally app

33、lied gate voltage is needed to change the surface potential to the strong inversion condition. Components of Threshold Voltage (cont.)36The voltage drop across the semiconductor surface depletion :The voltage drop across the gate oxide : The gate voltage component to offset the depletion region char

34、ge (耗盡區(qū)電荷) . The voltage component to offset the fixed charges in the gate oxide and in the silicon-oxide interface. Depending on the gate material, the work function difference is:37 The work function for a material is the amount of energy needed to move an electron from the Fermi level (費米能級) to f

35、ree space level (自由空間能級). When two materials with different Fermi levels are brought together into one system, the Fermi levels are alighted at equilibrium. The work function difference tells us how “misaligned” they are to begin with. Gate Voltage Component to Change The Surface Potential38NMOS： PM

36、OS： This component of threshold voltage is the electrical potential difference between the surface and the substrate of semiconductor, that is, the surface potential of semiconductor. The surface Fermi potential of the semiconductor substrate is defined as the difference between the intrinsic Fermi

37、level and the actual Fermi level in the doped semiconductor. , is the doped concentration of the p-type and n-type substrate respectively. The surface electrical potential of semiconductor at the strong inversion is , at this time the gate voltage equals to twice the Fermi Potential (費米勢) .39Voltage

38、 Drop Across The Gate Oxide There always exists a fixed positive charge density (固定正電荷密度) at the interface between the gate oxide and the silicon substrate, due to impurities(雜質(zhì)) and/or lattice imperfections (晶格不完善) at the interface. Since there is positive charge effectively on the bottom plate of

39、the MOS capacitor, the top plate must provide negative charge to compensate for it. Therefore, it contributes a negative quantity to the threshold voltage . Where is the gate oxide capacitance per unit area.40Voltage Drop Across The Semiconductor Surface Depletion Another component of the applied ga

40、te voltage is necessary to offset the depletion region charge, which is due to the fixed acceptor ions (固定的受主離子) located in the depletion region near the surface. In the presence of an inversion layer, the charge stored in the depletion region is fixed, and we can calculate the depletion region char

41、ge density at surface inversion using: The gate voltage to offset the depletion region charge is .Threshold Voltage Formula 41 Now, we can combine all of these voltage components to find the threshold voltage. Under zero substrate bias, the threshold voltage called the zero-bias threshold voltage is

42、 expressed as follows:Surface Charge Depletion Layer Charge Work function DifferenceThe Threshold Voltage Formula (cont.) 42Under nonzero substrate bias, the threshold voltage is expressed as follows: If the substrate is biased at a different voltage level than the source, the depletion region charg

43、e is influenced by . Then the depletion region charge density can be expressed as a function of the voltage .Body Effect43 Noted that the source-bulk voltage VBS has an impact on the threshold, called the body effect (襯偏效應(yīng)). Rather than relying on a complex analytical expression (解析表達(dá)式) for the thre

44、shold, we rely on an empirical parameter (經(jīng)驗參數(shù)) called , which is the threshold voltage with , and is mostly a function of the manufacturing process.The Body Effect (cont.)44Under different body-biasing conditions , the threshold voltage is expressed as follows:Threshold voltage at =0, and is mostly

45、 a function of the manufacturing process.Substrate bias ( bulk source voltage)The body-effect coefficient (襯偏效應(yīng)系數(shù)) or body factor (體因子) : it expresses the impact of changes in .Note: The threshold voltage has a positive value for a typical NMOSFET, while it is negative for a normal PMOSFET.Effect of

46、 body-bias on thresholdVBS (V)VT (V) VBS is the substrate bias voltage (normally negative for n-channel devices with the body tied to ground). A negative bias on substrate causes VT to increase from 0.45V to 0.85V45 The effect of the body bias on the threshold voltage of an NMOS transistor is plotte

47、d in for typical values of =0.6V and V.Example: threshold voltage of a transistorVT0 = VFB + s + QB/Cox + VII = -0.91 V + 0.58 V + (1.4E-8/1.73E-7) + 0.92 V = 0.68 VBody effect n = sqrt(2qSiNA/Cox) = 0.1DVt = nsqrt(s + VSB) - sqrt(s) = 0.16 V46Signs in Threshold Voltage Equation47 Parameter NMOS PMO

48、SSubstrate p-type n-typeEffect of Threshold Implant on ThresholdThe final value of is determined during circuit fabrication by ion implanting dopant atoms into the channel region. 48A p-type threshold implant, using boron(硼) for example, will make the threshold voltage more positive. On the other ha

49、nd, an n-type threshold implant, using phosphorus(磷) for example, makes the threshold voltage more negative. NMOS threshold voltage are adjusted using a p-type implant until the desired positive value is reached. PMOS thresholds are all adjusted with n-type implants until they are at the desired neg

50、ative value. If is the charge density per unit area in the channel region due to the implant, then the threshold voltage is shifted by , where is the ion-implant doses in unit of .NotesThe above calculations of threshold voltage dont give exact quantitative results (數(shù)量結(jié)果) in practical cases.49Calcul

51、ations of threshold voltage are useful for predicting how varies as a function of doping levels (摻雜濃度) and dimensions(器件尺寸).As a practical matter for circuit design, nominal values (標(biāo)稱值) and statistical variations (統(tǒng)計變化) of the threshold voltage and body-effect coefficient must be determined by dire

52、ct measurements of actual devices.3.4 First-Order Current-Voltages Characteristics (一階電流電壓特性)50MOSFET Operation: A Qualitative View(定性觀察)First-Order Current-Voltages CharacteristicIntroductionSo far, we have treated transistors as ideal switches.An ON transistor passes a finite amount of currentDepe

53、nds on terminal voltagesDerive current-voltage (I-V) relationshipsTransistor gate, source, drain all have capacitanceI = C (DV/Dt) Dt = (C/I) DVCapacitance and current determine speed51Also explore what a “degraded level” really means52Gate and body form MOS capacitorOperating modes:(a) Accumulation

54、(b) Depletion(c) InversionIntroduction (cont.)Characteristics of MOS Transistor The conducting current of NMOS transistor denoted is the flow from the drain electrode to the source electrode.Transition (Input) characteristic 轉(zhuǎn)移(輸入)特性 Current-Voltage (Output) characteristic 電流電壓(輸出)特性53 It describes

55、the relationship between the gate-source voltage and the drain-source current with the certain drain-source voltage . It describes the relationship between the drain-source voltage and the drain-source current with a certain gate-source voltage .Transition (Input) Characteristic The controlling func

56、tion of on the conducting current decides the transition characteristic(轉(zhuǎn)移特性) of MOS transistor:54 When the gate-source voltage is less than the threshold voltage , the conducting current is zero, that is, the NMOS transistor is in cutoff operation. When is larger than , the NMOS transistor is on. T

57、he threshold voltage determines the operation state in which a MOS transistor is in a digital circuit. And then, at the near less than VT, there existed a small current described in the second order effects (weak inversion).55Current-Voltage (Output) Characteristic The controlling function of on the

58、 conducting current decides the output characteristic of MOS transistor: The different drain current-drain voltage curves at the different gate voltage are called as the I-V characteristic of a MOS transistor. MOSFET Operation: A Qualitative View56Three basic regions of operation:Cutoff regionLinear

59、 (Resistive) regionSaturation regionN Transistor Operation - Cutoff Vgs =0: Transistor OFFMajority carrier in channel area (holes)No current from source to drainTransistorOff57N Transistor Operation - Subthreshold 0 Vgs Vt : Transistor ONElectric field attracts minority carriers (electrons)Inversion

60、 region forms in channelDepletion region insulates channel from substrateCurrent can now flow from drain to sourceTransistorOn59N Transistor Operation Vgs Vt , VDS=0: Current can now flow from drain to source!Thermal equilibrium exists in the inverted channel region, and the drain current is equal t