系統(tǒng)級芯片論文：AVS視頻解碼芯片功能驗證平臺的研究與實現(xiàn)

1、系統(tǒng)級芯片論文：AVS視頻解碼芯片功能驗證平臺的研究與實現(xiàn)【中文摘要】隨著集成電路技術(shù)的不斷發(fā)展,市場對芯片產(chǎn)品提出了更高的要求,它們必須擁有更強的功能并且體積更小、功耗更低、價格更合理才能在激烈的市場競爭中獲得一席之地。在基于IP重用的SoC設計已經(jīng)成為芯片設計業(yè)主流的今天,SoC驗證工作需要投入的時間一般占到整個開發(fā)周期的70%,驗證難度是傳統(tǒng)芯片的3到5倍,傳統(tǒng)的驗證方法和技術(shù)已經(jīng)不能滿足當前的需要,驗證已成為當前業(yè)界最有挑戰(zhàn)性、最具研究價值的課題之一。本文首先介紹了功能驗證的地位以及功能驗證的一般方法,結(jié)合實際情況分析了功能驗證的發(fā)展趨勢,并在功能驗證平臺設計中加以實踐；在分析了AVS

2、視頻解碼芯片的架構(gòu)和接口的基礎上完成了其功能驗證平臺的設計工作；在驗證平臺的實際應用方面,對芯片整體的功能驗證策略做了分析,在集成驗證中采用了受約束隨機測試與定向測試相結(jié)合的激勵生成方法、綜合考慮代碼覆蓋率與功能覆蓋率的覆蓋率收斂方法,以及以覆蓋率為導向、覆蓋率結(jié)果反饋測試端的驗證流程。為了提高驗證的效率,使用基于SystemVerilog語言的模塊參考模型代替設計尚未設計完備的子模塊,從而在模塊級驗證未完成的情況下啟動集成驗證工作。所設計的功能驗證平臺結(jié)合驗證方案在實際工作中取得了良好的效果,比傳統(tǒng)的驗證平臺和驗證方案具有更高的驗證效率和代碼可重用率,縮短了芯片的開發(fā)周期。最后,本文對所進行

3、的工作進行了簡單總結(jié),歸納了不足之處以及進一步工作的要點。【英文摘要】With the development of integrated circuit technology, the market puts forward higher requirement about chips, they must be multifunction but more smaller,and have lower power consumption with the more reasonable price to gain a foothold in the fierce competition o

4、f market. Today IPreuse-based SoC has become the mainstream in chip design field, time-consuming SoC verification normally account for 70% of the entire design cycle, whose verification difficulties are 3 to 5 times of the traditional chip. So traditional verification methods can no longer meet curr

5、ent needs, verification has become one of the most challenging and valuabletopics.Firstly,this paper discussed the position and the common methods of functional verification, analyzes thedevelopment trend of functional verification and applied them in practice.Then on the basis of the analysis of th

6、e AVS video decoder chip architecture and interfaces, an appropriative functional testbench was proposed. When it comes to the practical application of testbench, we analyzed theverification strategies of the entire chip and use the stimulus generation strategy-a combination of constraint-based rand

7、om testing and directed testing, the coverage convergencestrategy considering the code coverage and functional coverage, and the coverage-oriented verification flow with results back to the test side in the integrate verification. In order to improve the verification efficiency, the SystemVerilog-ba

8、sed reference modules replaced the modules whose designs were not complete yet, so that integrate verification could be activated in the case of uncompleted verification at the block level. Combined with the verification strategy the functionaltestbench showed its excellent performance, more verific

9、ation efficiency and more code reuse compared to traditionaltestbench, thus the design cycle time was reduced. Finally, the paper carried out a brief summary of the entire work, and summarized the shortcomings and the main points of further work.【關(guān)鍵詞】系統(tǒng)級芯片 驗證 SystemVerilog 功能驗證平臺【英文關(guān)鍵詞】System-on-Chi

10、p VerificationSystemVerilog Functional Testbench【目錄】AVS視頻解碼芯片功能驗證平臺的研究與實現(xiàn)8-911-1714-16業(yè)化15-16ABSTRACT9符號說明10-11摘要第一章 緒論1.2 課題來源1.2.2 AVS標準的產(chǎn)第1.1 研究背景及意義11-141.2.1 AVS標準概述14-151.3 論文的主要內(nèi)容及論文結(jié)構(gòu)16-17二章 SOC功能驗證技術(shù)17-3317-20證法20-2121-22術(shù)25-282.1 SOC設計流程與驗證2.2.1 黑盒驗2.2 功能驗證方法與技術(shù)20-292.2.2 白盒驗證法212.2.4 動態(tài)驗證

11、技術(shù)22-252.2.3 灰盒驗證法2.2.5 靜態(tài)驗證技2.3 功能2.2.6 軟硬件協(xié)同驗證技術(shù)28-292.3.1 驗證層次的抽象化驗證的發(fā)展趨勢29-33302.3.2 驗證過程的自動化30-312.3.3 驗證資源的重用化31-3232-3333-582.3.4 激勵的隨機化及驗證的并行化第三章 AVS視頻解碼芯片功能驗證平臺設計3.1 AVS視頻解碼芯片分析33-373.2.1 驗證語言38-393.2 驗證語言3.2.2 驗證3.3.1 傳統(tǒng)和驗證工具37-40工具39-403.3 功能驗證平臺架構(gòu)40-45驗證平臺的結(jié)構(gòu)40-4141-45結(jié)構(gòu)45-46序48-513.3.2 分層次的驗證平臺3.4.1 頂層文件3.4.3 驗證平臺程3.5 驗證平臺的3.4 功能驗證平臺設計45-553.4.2 接口設計46-483.4.4 驗證環(huán)境組件51-55工作流程55-5858-7160-6163-6565-6769-7