Cirrus CS42L73高集成低功耗音頻CODEC解決方案_第1頁
免費預(yù)覽已結(jié)束,剩余7頁可下載查看

下載本文檔

版權(quán)說明:本文檔由用戶提供并上傳,收益歸屬內(nèi)容提供方,若內(nèi)容存在侵權(quán),請進行舉報或認(rèn)領(lǐng)

文檔簡介

1、cirrus cs42l73高集成低功耗音頻codec解決方案公司的cs42l73是高度集成低功耗音頻和電話codec,適用于手提設(shè)備如智能手機,筆記本電腦. cs42l73具有靈便的時鐘架構(gòu),可采納的基及時鐘為6, 12, 24, 13, 26, 19.2, 或38.4 mhz,立體聲,支持兩路模擬或數(shù)字mic,四個耦合到五個輸出,單聲道耳機和1w揚聲器放大器,數(shù)字音頻混合和路由, 3.00 v - 5.25 v工作,超低功耗,模數(shù)轉(zhuǎn)換具有91db動態(tài)范圍和-85db thd+n,dac到線輸出的動態(tài)范圍97db, -86db thd+n.本文介紹了cs42l73主要特性,方框圖, 典型應(yīng)用

2、和評估板cdb42l73特性, 系統(tǒng)框圖,圖,元件布局圖與cs42l73在智能手機中的應(yīng)用框圖.the cs42l73 is a highly integrated, low-power, audio and telephony codec for portable applications such as smartphones and ultra mobile personal computers.the cs42l73 features a flexible clocking architecture, allowing the device to utilize reference c

3、lock frequencies of 6, 12, 24, 13, 26, 19.2, or 38.4 mhz, or any standard audio master clock. up to two reference/master clock sources may be connected; either one can be selected to drive the internal clocks and processing rate of the cs42l73.thus, multiple master clock sources within a system can

4、be dynamically activated and de-activated to minimize system- level power consumption.three asynchronous bidirectional serial ports (auxiliary, audio, and voice serial ports) support multiple clock domains of various digital audio sources or destinations. three low-latency, fast-locking, integrated

5、high-performance asynchronous sample rate converters synchronize and convert the audio samples to the internal processing rate of the cs42l73.a stereo line input or two mono (one stereo) microphone (mic) inputs are routed to a stereo adc. the mic inputs may be selectively pre-amplified by +10 or +20

6、 db. two independent, low-noise mic bias voltage supplies are also provided. a programmable gain amplifier (pga) is applied to the inputs before they reach the adc.the stereo input path that follows the stereo adc begins with a multiplexer to selectively choose data from a digital mic interface. fol

7、lowing the multiplexer, the data is decimated, selectively dc high-pass filtered, channelswapped or mono-to-stereo routed (fanned-out), and volume adjusted or muted. the volume levels can be automatically adjusted via a programmable automatic level control (alc) and noise gate.a digital mixer is uti

8、lized to mix and route the cs42l73s inputs (analog inputs to adc, digital mic, or serial ports) to outputs (dac-fed amplifiers or serial ports). there is independent attenuation on each mixer input for each output.the processing along the output paths from the digital mixer to the two stereo dacs in

9、cludes volume adjustment and mute control. a peak-detector can be used to automatically adjust the volume levels via a programmable limiter.the first stereo dac feeds the stereo headphone and line output amplifiers, which are powered from a dedicated positive supply. an integrated charge pump provid

10、es a negative supply. this allows a ground-centered analog output with a wide signal swing, and eliminates external dc-blocking capacitors while reducing pops and clicks. trilevel class-h amplification is utilized to reduce power consumption under low-signal-level conditions. analog volume controls

11、are provided on the stereo headphone and line outputs.the second stereo dac feeds several mono outputs. the left channel of the dac sources a mono, differentialdrive, speakerphone amplifier for driving the handset speakerphone. the right channel sources a mono, differential- drive, earphone amplifie

12、r for driving the handset earphone. the right channel is also routed to a mono,differential-drive, speakerphone line output, which may be connected to an external amplifier to implement a stereo speakerphone configuration when it is used in conjunction with the integrated speakerphone amplifier.the

13、cs42l73 implements robust power management to achieve ultra-low power consumption. high granularity in power-down controls allows individual functional blocks to be powered down when unused. the internal low dropout regulator () saves power by running the internal digital circuits at half the logic

14、interface supply voltage (vl/2). in a system with an existing high-efficiency supply at vl/2, the internal ldo may be disabled and the digital circuits powered directly by the external vl/2 supply. a high-speed i c control port interface capable of up to 400 khz operation facilitates register progra

15、mming.the cs42l73 is available in space-saving 64-ball wlcsp and 65-ball fbga packages for the commercial (-40° to +85° c) grade.cs42l73主要特性:stereo adcdual analog or digital mic supportdual mic bias generatorsfour dacs coupled to five outputsground-centered stereo headphone amp.ground-cent

16、ered stereo line outputmono ear speaker amplifiermono 1 w speakerphone amplifiermono speakerphone line output for stereo speakerphone expansionthree serial ports with asynchronous sample rate convertersdigital audio mixing and routingultra low power consumption3.5 mw quiescent headphone playbacksyst

17、em featuresnative (no pll required) support for 6/12/24 mhz, 13/26 mhz, and 19.2/38.4 mhz master clock rates in add.to typ. audio clock ratesintegrated high-efficiency power management reduces power consumption internal ldo regulator to reduce internal digital operating voltage to vl/2 step-down cha

18、rge pump provides low headphone/line out supply voltage inverting charge pump accommodates low system voltage by providing negative railfor hp and line ampflexible speakerphone amplifier powering 3.00 v to 5.25 v range independent cycling&61472ower down management individual controls for adcs, d

19、ig. mic interface, mic bias generators, serial ports,and output amplifiers & associated dacs&61472rogrammable thermal overload notificationhigh-speed i c control port (400 khz)stereo analog to digital features91 db dynamic range (a-wtd)-85 db thd+nindependent adc channel control2:1 stereo an

20、alog input muxstereo line input shared pseudo-differential reference inputdual analog mic inputs pseudo-diff. or single-ended two, independent, programmable, lownoise, mic bias outputs mic short detect to support headset buttonanalog programmable gain amplifier (pga) (+12 to -6 db in 0.5 db steps)+1

21、0 db or +20 db analog mic boost in addition to pga gain settings&61472rogrammable automatic level control (alc) noise gate for noise suppression progr. threshold & attack/release ratesdual digital microphone interface&61472rogramable clock rate integer divide by 2 or 4 of internal mclkst

22、ereo dac to headphone amplifier94 db dynamic range (a-wtd)-81 db thd+n into 32integrated step-down/inverting charge pump class h amplifier - automatic supply adj. high efficiency low emi&61472seudo-differential ground-centered outputshigh hp power output at -70/-81 db thd+n 2 x 17/8.5 mw into 16

23、/32 1.8 v&61472op and click suppressionanalog vol. ctl. (+12 to -50 db in 1 db steps; to -76 db in 2 db steps) with zero-cross trans.digital vol. ctl. (+12 to -102 db in 0.5 db steps) with soft-ramp transitions&61472rogrammable peak-detect and limiterstereo dac to line outputs97 db dynamic r

24、ange (a-wtd)-86 db thd+nclass-h amplifier&61472seudo-differential ground-centered outputs1 vrms line output 1.8 v&61472op and click suppressionanalog vol. ctl. (+12 to -50 db in 1 db steps; to -76 db in 2 db steps) with zero-cross trans.digital vol. ctl. (+12 to -102 db in 0.5 db steps) with

25、 soft-ramp transitions&61472rogrammable peak-detect and limitermono dac to ear speaker amplifierhigh power output at -70 db (0.032%) thd+n 45 mw into 16 1.8 vpop and click suppressiondigital vol. ctl. (+12 to -102 db in 0.5 db steps) with soft-ramp transitionsprogrammable peak-detect and limitermono dac to speakerphone amplifierhigh output power at 1% thd+n1.18/0.84/0.66 w into 8 5.0/4.2/3.7 vdirect battery-powered operationpop and click suppressiondigital vol. ctl. (+12 to -102 db in 0.5 db steps) with soft-ramp transitionsprogrammable peak-de

溫馨提示

  • 1. 本站所有資源如無特殊說明,都需要本地電腦安裝OFFICE2007和PDF閱讀器。圖紙軟件為CAD,CAXA,PROE,UG,SolidWorks等.壓縮文件請下載最新的WinRAR軟件解壓。
  • 2. 本站的文檔不包含任何第三方提供的附件圖紙等,如果需要附件,請聯(lián)系上傳者。文件的所有權(quán)益歸上傳用戶所有。
  • 3. 本站RAR壓縮包中若帶圖紙,網(wǎng)頁內(nèi)容里面會有圖紙預(yù)覽,若沒有圖紙預(yù)覽就沒有圖紙。
  • 4. 未經(jīng)權(quán)益所有人同意不得將文件中的內(nèi)容挪作商業(yè)或盈利用途。
  • 5. 人人文庫網(wǎng)僅提供信息存儲空間,僅對用戶上傳內(nèi)容的表現(xiàn)方式做保護處理,對用戶上傳分享的文檔內(nèi)容本身不做任何修改或編輯,并不能對任何下載內(nèi)容負(fù)責(zé)。
  • 6. 下載文件中如有侵權(quán)或不適當(dāng)內(nèi)容,請與我們聯(lián)系,我們立即糾正。
  • 7. 本站不保證下載資源的準(zhǔn)確性、安全性和完整性, 同時也不承擔(dān)用戶因使用這些下載資源對自己和他人造成任何形式的傷害或損失。

評論

0/150

提交評論