SoC設(shè)計(jì)方法與實(shí)現(xiàn)IO環(huán)設(shè)計(jì)學(xué)習(xí)教案

1、會(huì)計(jì)學(xué)1SoC設(shè)計(jì)方法設(shè)計(jì)方法(fngf)與實(shí)現(xiàn)與實(shí)現(xiàn)IO環(huán)設(shè)計(jì)環(huán)設(shè)計(jì)第一頁，共19頁。第1頁/共18頁第二頁，共19頁。SingulationMoldingSolder Ball AttachPackaging Process SawingWire BondingDieDie AttachWaferWireSubstratePackingFinal TestSolder BallMolding Compound第2頁/共18頁第三頁，共19頁。Ball Grid Array (BGA)Small Outline PackageDual-In-Line PackagePlastic Pin G

2、rid ArrayPlastic Quad Flat PackageChip Scale Package (CSP)System In Package (SIP)Plastic Leaded Chip CarrierThin Outline Package第3頁/共18頁第四頁，共19頁。Industry Packing Trends第4頁/共18頁第五頁，共19頁。 第5頁/共18頁第六頁，共19頁。第6頁/共18頁第七頁，共19頁。Flip Chip PackagesPros Good electrical performance(reduced inductance) Good ther

3、mal performance w/heat sink Large number of die pads per die areaSmall die size and low package heightCons High cost solution Board level reliability concernsDirect solder bumping onto the die, placing the interconnection bump directly onto the substrate, eliminating the need for wire bonding. SUBST

4、RATE(Organic or Ceramic)CHIPSolder bumpSolder ball第7頁/共18頁第八頁，共19頁。Solder BallPolymer 1Redistribution MetalChipPolymer 1Solder BallPassivationUBMChipSi WaferSolderUBMPassivationWafer Scale CSP第8頁/共18頁第九頁，共19頁。第9頁/共18頁第十頁，共19頁。Package DriversElectricalThermalMechanicalCostPackage Body SizeI/O CountDi

5、e SizeReliabilityPackage Selection Process第10頁/共18頁第十一頁，共19頁。第11頁/共18頁第十二頁，共19頁。Thermal Performance and ImprovementlAdding thermal pads to improve thermal performancelA typical Power BGA (PBGA) Structure:Thermal simulationThermal BallsPBGA has thermal path through thermal via and ball第12頁/共18頁第十三頁，共

6、19頁。Packaging General GuidelinesPackages affect both power supply delivery and signal integrityWirebond packagesnAlways use package with a ground planenNever use for high power designs (too much IR drop, noise)nNever use above 4GbpsFlip Chip packagesnAlways use for 4+GbpsnAlways use for high power s

7、ystemsnCan be the best power, best performancenMore knowledge needed to buildnCan be built poorly 第13頁/共18頁第十四頁，共19頁。3C Package Evolution第14頁/共18頁第十五頁，共19頁。第15頁/共18頁第十六頁，共19頁。ConclusionslThere is no one package for all applicationslFlip Chip provides the best electrical performancelPBGA provides the best thermal performancelLeaded packages provide the best board level reliability performancelThe right package is the one that can meet all the requirements and constraints of the application for t