【精品文檔】38中英文雙語外文文獻(xiàn)翻譯成品：汽車應(yīng)用領(lǐng)域的單片機(jī)三模冗余分集

此文檔是畢業(yè)設(shè)計(jì)外文翻譯成品（ 含英文原文+中文翻譯），無需調(diào)整復(fù)雜的格式！下載之后直接可用，方便快捷！本文價(jià)格不貴,也就幾十塊錢！一輩子也就一次的事！外文標(biāo)題：Towards Single-Chip Diversity TMR for Automotive Applications外文作者：Omar Hiari, Waseem Sadeh, and Osamah Rawashdeh文獻(xiàn)出處:IEEE International Conference on Electro/information Technology,2018,1-6(如覺得年份太老，可改為近2年，畢竟很多畢業(yè)生都這樣做)英文4589單詞， 24706字符(字符就是印刷符)，中文6989漢字。Towards Single-Chip Diversity TMR for Automotive ApplicationsOmar Hiari, Waseem Sadeh, and Osamah RawashdehElectrical and Computer Engineering DepartmentOakland University Rochester, M, , rawashd2oakland.edAbstractThe continuous requirement to provide safe, low- cost, compact systems makes applications such as automotive more prone to increasing types of faults. This may result in increased system failure rates if not addressed correctly. While some of the faults are not permanent in nature, they can lead to malfunctioning in complex circuits and/or software systems. Moreover, automotive applications have recently adopted the ISO26262 to provide a standard for defining functional safety. One of the recommended schemes to tolerate faults is Triple Modular Redundancy (TMR). However, traditional TMR designs typically consume too much space, power, and money all of which are undesirable for automotive. In addition, common mode faults have always been a concern in TMR which their effects would be increasing in compact systems. Errors such as noise and offset that impact a TMR sensor input can potentially cause common mode failures that lead to an entire system failure. In this paper, we introduce a new architecture and implementation for diverse TMR in a speed measurement system that would serve automotive cost and safety demands. Diversity TMR is achieved on a single chip by designing functionally identical circuits each in a different design domain to reduce the potential of common mode failures. Three versions of a speed sensing application are implemented on a mixed-signal Programmable System on Chip (PSoC) from Cypress Semiconductors. We introduce errors that impact speed sensor signals as defined by the ISO26262 standard to evaluate DTMR. Our testing shows how DTMR can be effective to different types of errors that impact speed sensor signals.Keywords-component; TMR; DTMR; SEUs; ISO26262; Functional Safety; Fault Tolerance;I.INTRODUCTIONIn recent times, Triple Modular Redundancy (TMR) has become one of the common effective error mitigation methods used to increase system reliability. TMR has been used in both aeronautic and ground systems. In aviation system applications, such as the Boeing 777, TMR is implemented across all systems to ensure reliable operation 16. In addition, as automotive systems are moving towards safety critical x-by-wire systems, fault tolerant methods such as TMR are needed due to high reliability requirements. As a result, as higher standards for reliability become necessary, the cost and unit size still need to be kept at a minimum.Two of the main constraints in automotive are cost and size. The nature of the automotive industry being focused on mass produced products makes it more cost driven. Size is also critical to reduce the overall vehicle weight. Nevertheless, TMR has traditionally been obtained by triplication of hardware functionality to reduce effects of common mode errors. Traditional approaches therefore are not the most cost or size effective for applications such as automotive. In addition, memory, power, and clock signals could be either shared or physically separate while using a single chip depending on how much separation is required. Therefore, SoCs provide a more cost effective platform on which TMR can be implemented. More of those implementations have to be studied, however, to understand how much of an advantage is gained over existing schemes.As functional safety is becoming more prevalent in automotive applications, challenges are increasing to address the different environment effects to maintain highly reliable systems. Functional safety standards, such as the ISo 26262, have been developed to establish a baseline, which applications are required to meet. The reliability of an embedded system unit involves many different aspects such as; sensors and/or actuators, software, environment and EMC, integrated circuits, and verification and validation.Automotive Safety Integrity Levels (ASILs) have been introduced as part of the recently released ISo26262 standard to evaluate the safety of automotive systems. System electronic modules are assigned an ASIL to indicate the level of safety a module can provide. ASIL D is the rating for the most dependable systems and ASIL A for the least dependable systems. Therefore to meet a certain ASIL level, a component design must incorporate all necessary fault detection and mitigation techniques required for achieving that level 15.In the ISo26262 TMR, among other fault mitigation methods, is highlighted as one of the methods recommended to increase reliability of a system. TMR masks out faults by introducing three redundant copies of a system that are continuously voted on. As a result, TMR reduces the probability of having system failure if one of the blocks fails. However, given that circuits are identical, and TMR in its simplest form, does not have the capability to handle multiple failures, common mode faults remain to pose a special threat. Faults could be due to design faults in the redundant copies, Electromagnetic Interference (EMI), or even temperature. Depending on the faults of concern, some of the methods utilized in reducing common mode errors include using hardware manufactured by different suppliers, developing software for every block by different teams, or placing the different blocks physically far apart from each other. Existing methods therefore might increase the cost or size of systems required.Recent advancements in system-on-chip solutions have allowed the design of mixed signal implementations on a single chip. System on Chip (SoC) designs can be flexible to allow good separation between designs as required while keeping the cost and size at a minimum. However, the reliability of such TMR designs needs to be further studied. Especially their tolerance to common mode faults.We investigate the capabilities of a Programmable System on Chip (PSoC), with its diverse mixed signal resources, to provide lower cost TMR that is more immune to common mode faults. We use the Cypress PSoC3 platform to implement our work. II. CONCEPTThe proposed scheme implemented to enhance tolerance of common mode faults is diversity triple-modular- redundancy (DTMR) 8. As shown in Figure 1, the idea of traditional TMR is to increase system reliability by feeding three identical circuits into a “voter” which masks out the faulty circuit. The goal of TMR is to isolate the fault containment regions in between the different implementations. To maximize isolation of fault containment regions, traditional TMR methods usually call for the use of multi package solutions when it comes to silicon implementations. However, recent semiconductor trends have enabled the maximization of fault containment regions on a single chip where shared resources can be minimized.TMR is categorized as an M-of-N system with a voter. An M-of-N system is one that consists of N redundant blocks that need at least M of them to be operational. Therefore, TMR would qualify as a 2-of-3 system. The reliability of any M-of-N system without a voter can be represented as 17Where R(t) is the reliability that presents the probability that a block is still operational at time t and,For a 2-of-3 system this reduces toIn the case the three blocks are affected by a common mode fault with a probability FCM then the reliability becomesAdding the reliability of a voter Rvoter(t) to represent a TMR system the expression becomesThe focus of our work essentially is to keep the value of FCM at a minimum in compact, low cost systems. Determining the value of FCM nevertheless requires long hour testing that we preserve for future work. What will be proven on the other hand is that DTMR can potentially enhance the value of FCM and thus qualify it for long hour testing. It can also be seen from the expression that the reliability of the voter is critical to proper operation of TMR as it is a single point of failure. However, reliability of the voter is not the focus of this work as there has been other work that addresses the reliability of voters.Sources of common-mode failures are faults that cause redundant copies to fail under identical conditions. In the case of identical TMR systems, faults affecting the three system blocks could be identical. Therefore, for increased system reliability we explore the effect of diversifying the design of the TMR concept by implementing TMR in three different design versions: digital hardware, analog hardware, and software.Table I demonstrates the characteristic differences between different design implementation domains. The main characteristic advantage that the analog design domain carries over the digital domain is it having continuous signal types. Continuous signal types have the advantage of preventing dramatic change in state. For example, in a digital system a direction variable can change from East to West due to a bit flip error. In an analog system, however, the change would be more gradual if an error occurs. On the other hand, digital domain designs for edge detect type sensors are less tolerant to higher voltage offsets than analog design especially in signals that require an edge detect (i.e., a tachometer type sensor signal in the case of our work). It must be noted however that constant voltage reading type sensor signals would have to be evaluated differently in offset casesIn the case of random noise for analog designs, the quality of filtering would determine how well circuit performs. Generally it would be hard for a filter to keep out a large range of frequencies; therefore, the design could be more adversely affected. This assumes, however, that proper design guidelines have been followed. Digital domain implementations, including software, can be affected equally by random noise where tachometer edges can be missed. In digital hardware and software implementations, however, as long as an edge is detected then random noise has virtually no effect throughout the remainder of the speed measurement operations. On the other hand, in an analog implementation the effect of noise can carry out through the whole circuit to produce a faulty output. SEU immunity is critical as semiconductor packages keep on shrinking for digital devices. Therefore, as SEUs are more involved with bit flipping in memory then analog devices should be less prone to that effect if implemented external to the integrated device. SEUs are effectively what affects the remainder of speed measurement operations in digital domain operations. The rate at which SEUs occur is generally determined by what ASIL requirement level is needed for a system in automotive applications.The last of the remaining characteristics is signal monitoring. Periodic type, interrupt driven monitoring in software implementations make it more likely for signals to be either missed or readings delayed. As a result, periodic type monitoring can potentially provide inaccurate readings. As demonstrated so far, collectively all the different characteristics of the different design implementations make it less likely for one type of error to affect all DTMR copies in a similar manner. A Programmable System on Chip (PSoC) development board from Cypress Semiconductors is used for the D-TMR implementation of the speed sensing application. The PSoC provides a mixed signal platform that includes a CPU, a digital configurable block defined by a hardware description language, and an analog block allowing the containment of most of all three diverse design blocks using a single chip. In the analog version, minimal external components are still required given that the SoC analog implementation capability is limited.The application chosen to implement our diversity TMR concept is a speed sensor monitor. We chose this application because sensor applications exist widely in automotive systems and are an essential part of almost any control system. Speed sensing applications are common in many safety critical embedded systems making the results of this study of wide interest.Our implementation consists of four main parts: the software version, the analog hardware version, the digital hardware version, and the voter. Figure 2 shows the entire block diagram implementation of the DTMR system. The three copies of the TMR structure all feed into a voter, which is implemented in software that produces the “voted” compare value to a UART block to feed the data to a PC that collects the data. A fan tachometer that produces 2 pulses per revolution is used to detect speed. The tachometer line feeds back to an analog frequency to voltage converter for the analog block, an interrupt pin for the software block and directly to the digital hardware block. The frequency to voltage converter provides a constant voltage that is proportional to the speed of the fan. The voltage is then scaled and fed into an ADC. The ADC output is directly fed into the voter for comparison with the other two copy Outputs. More detail on the separate implementation versions is presented in the following subsections. A. Software VersionThe tachometer output, which is the current fan speed, is fed to an interrupt pin that is triggered at every rising edge of the tachometer signal. Another interrupt is also generated internally that triggers every rising edge of a 120kHz clock signal. The interrupt service routine saves the count and provides the period to the main loop. The main software loop then converts the count into an RPM value and stores it into a variable that is collected by the Voter algorithm.B. Digital Hardware VersionAs mentioned earlier, the PSoC platform allows the implementation of digital logic using hardware description language. Hence, the digital copy of our DTMR implementation is implemented in Verilog. As can be observed in Figure 3, the tachometer feedback signal is fed back directly to the digital block. The digital block maintains a count value that is incremented with every clock rising edge. In addition, at every rising edge of the tachometer signal, the count value is stored to a different register and then reset. The stored count value is then used to calculate the RPM and stored into another register for Voter algorithm to retrieve.C.Analog Hardware VersionThe analog version is implemented using an external frequency to voltage converter and a voltage scaling circuit. Fully integrating the analog block can be achieved as PSoCs further develop their analog capability. For the mean time, an external frequency to voltage converter is needed to convert the tachometer signal to a constant voltage that is proportional to the period of the signal, and thus the speed of the motor. The F/V output voltage is then scaled appropriately ahead of feeding into the ADC so that an RPM value is available right after the conversion. The ADC output then stores the result to a software variable that makes the result available for the Voter algorithm to collect.D. VoterSimilar to the work done by G. Borges et al., the voter design was implemented in software because the majority of signals were already in digital format 1. Therefore, only the analog block output had to be converted to a digital value. Due to the different execution times of the different implementations, the output signals of the blocks could potentially be out of sync. Therefore, a method had to be determined to take timing differences between the three copies into account. Voter synchronization techniques havebeen classified in the past into three types 12: 1. Independent Accurate Time Bases: The blocks would synchronize for a short period of time. Then, the separate blocks would each rely on the accuracy of their own time base.2. Common External Reference: The various blocks would share a common reference.3. Mutual Feedback: The blocks have no common feedback and would have to synchronize with each other.Given that there is not common time base between the three different versions it was decided to maintain synchronization by mutual feedback. In our implementation of mutual feedback, the voter synchronizes the conversions by maintaining two signals. The voter receives a READY signal from each block and in the same time feeds a common GO signal to each of them. The GO signal is triggered by the voter as a signal for every block to start its conversion and/or calculation. The READY signal provided by each block tells the voter that a value is available to be compared. Once all blocks have values available, the voter proceeds with the comparison algorithm to produce an output to the PWM block.The voter is implemented in software because two of the blocks are already providing digital outputs. After receiving all the output values from the different blocks, the voter algorithm compares each of the received output values to each other. If a block output value drifts away from an acceptable range of the other two RPM signals, then it will be considered the faulty output and will be masked out. If there is no fault, then the voter output would default to one of the block outputs. Otherwise, if a fault occurs on one block only, a priority is given to the output that needs to be selected as default to pass on as an RPM value.III. EXPERIMENT SETUPIn this work we consider failure modes of sensor elements as defined in the ISO26262 standard. There are 4 types of faults de