電子信息工程專業(yè)英語教程（第5版） 試題與答案 題庫5.0

PAGEPAGE1《電子信息工程專業(yè)英語教程(第5版)》題庫TOC\o"1-3"\uSectionA術(shù)語互譯 1SectionB段落翻譯 5SectionC閱讀理解素材 12C.1HistoryofTablets 12C.2ABriefHistoryofsatellitecommunication 13C.3Smartphones 14C.4Analog,DigitalandHDTV 14C.5SoC 15SectionA術(shù)語互譯課文核心專業(yè)術(shù)語1transistor晶體管semiconductor半導體LSILarge-scaleIntegration大規(guī)模集成（電路）VLSIVeryLarge-scaleIntegration超大規(guī)模集成（電路）2register寄存器cache高速緩存capacitor電容器flipflop觸發(fā)器interfacecircuitry接口電路CMOSComplementaryMetal-OxideSemiconductor互補金屬氧化物半導體ECLEmitterCoupledLogic射極耦合邏輯3latch鎖存器buffer緩存器bootsector引導扇區(qū)assemblylanguage匯編語言BIOSBasicInputOutputSystem基本輸入輸出系統(tǒng)MIPSMillionInstructionsPerSecond每秒百萬條指令4comparator比較器oscillator振蕩器currentsource電流源voltagesource電壓源levelshifter電平移動器signalconditioner信號調(diào)理器5angularfrequency角頻率qualityfactor品質(zhì)因數(shù)DCDirectCurrent直流電ACAlternatingCurrent交流電6decimation抽取interpolation插值referencevoltage參考電壓successiveapproximation逐次逼近法7inductor電感器rectifier整流器regulator穩(wěn)壓器conductivity導電性linearregulator線性穩(wěn)壓器loadcurrent負載電流8oscillator振蕩器detector檢波器seriesresonant串聯(lián)諧振parallelresonant并聯(lián)諧振phasedetector鑒相器,相位檢測器frequencydetector鑒頻器,頻率檢測器VCOVoltageControlledOscillator壓控振蕩器PLLPhaseLockedLoop鎖相環(huán)9pad焊盤lead引線powerloss功率損耗frequencyresponse頻率響應motherboard主板，母板daughterboard插件板，子板VSWRVoltageStandingWaveRatio電壓駐波比10antenna天線basestation基站endoffice端局FCCFederalCommunicationsCommission聯(lián)邦通信委員會PSTNPublicSwitchedTelephoneNetwork公共交換電話網(wǎng)11vocoder聲碼器simplex單工，單向通信deltamodulation增量調(diào)制spreadspectrumcommunication擴頻通信TDMTimeDivisionMultiplexing時分復用FDMFrequency-divisionmultiplexing頻分復用12modem調(diào)制解調(diào)器ethernet以太網(wǎng)powersupply電源heatsink散熱片USBUniversalSerialBus通用串行總線HDMIHigh-DefinitionMultimediaInterface高清晰度多媒體接口POSTpower-onself-test開機自檢OSOperatingSystem操作系統(tǒng)13schematic原理圖embeddedsystem嵌入式系統(tǒng)designflow設計流程presentstate現(xiàn)態(tài)nextstate次態(tài)EDAElectronicDesignAutomation電子設計自動化HDLHardwareDescriptionLanguage硬件描述語言ASICApplicationSpecificIntegratedCircuit專用集成電路FPGAFieldProgrammableGateArray現(xiàn)場可編程門陣列14prototype樣機cryptography密碼學statemachine狀態(tài)機Pmicroprocessor微處理器SoCSystem-on-Chip片上系統(tǒng)15stimulus激勵源timing時序highimpedance高阻16aliasing混疊spectrum頻譜sampleandholdcircuit采樣保持電路anti-aliasingfilter抗混疊濾波器fullscalerange滿量程范圍dynamicrange動態(tài)范圍DSPDigitalSignalProcessor數(shù)字信號處理器GPPGeneralPurposeProcessor通用處理器17multiplier乘法器accumulator累加器VonNeumannarchitecture馮?諾依曼結(jié)構(gòu)Harvardarchitecture哈佛結(jié)構(gòu)18filtering濾波crystal晶體passband通帶stopband阻帶voltagereference參考電壓cutofffrequency截止頻率ADCAnalogtoDigitalConverter模數(shù)轉(zhuǎn)換器DACDigitaltoAnalogConverter數(shù)模轉(zhuǎn)換器MIPSMillionInstructionsPerSecond每秒百萬條指令數(shù)SPSSamplePerSecond每秒樣本數(shù)19blockdiagram框圖datarate數(shù)據(jù)率Reed-Solomoncoding里德-索羅蒙編碼（RS編碼）Besselfilter貝塞耳濾波器20oscilloscope示波器transmissionbandwidth傳輸帶寬MPEGMotionPictureExpertsGroup運動圖象專家組21handoff越區(qū)切換baud波特videoconference視頻會議networkoperator網(wǎng)絡運營商chiprate碼片速率timeslot時隙ADSLAsymmetricalDigitalSubscriberLoop非對稱數(shù)字用戶線DSSSDirectSequenceSpreadSpectrum直序擴頻22edgedetection邊緣檢測objectrecognition目標識別magnitudespectrum幅度譜phasespectrum相位譜DCTDiscreteCosineTransform離散余弦變換23resolution分辨率CCDChargeCoupledDevice電荷耦合器件LCDLiquidCrystalDisplay液晶顯示器24luminance亮度chrominance色度carrierwave載波25RISCReducedInstruction-SetComputer精簡指令集計算機JTAGJointTestActionGroup聯(lián)合測試行動組26operand操作數(shù)thread線程concurrentprocess并發(fā)進程truthtable真值表programcounter程序計數(shù)器addressingmode尋址模式RTOSReal-TimeOperatingSystem實時操作系統(tǒng)27algorithm算法devicedriver設備驅(qū)動程序28oscilloscope示波器multiplexer多路復用器logicanalyzer邏輯分析儀stimulussignal激勵信號AWGArbitraryWaveformGenerator任意波形發(fā)生器DMMdigitalmultimeter數(shù)字多用表29transducer傳感器attenuator衰減器electronbeam電子束fundamentalfrequency基頻CRTCathodeRayTube陰極射線管30probe探頭timingdiagram時序圖propagationdelay傳輸延遲SUTSystemUnderTest被測系統(tǒng)SectionB段落翻譯編號m.n代表第m課第n段；此外，a代表前半段，b代表后半段編號中英文對照1.2Theadvantagesofthetransistoroverthevacuumtubewereenormous.Comparedtotheoldtechnology,transistorsweremuchsmaller,faster,andcheapertomanufacture.Theywerealsofarmorereliableandusedmuchlesspower.Thetransistoriswhatstartedtheevolutionofthemoderncomputerindustryinmotion.和真空管相比，晶體管具備巨大的優(yōu)勢——尺寸小、速度快、成本低，性能更可靠、耗能也更少。晶體管的發(fā)明帶來了計算機工業(yè)的蓬勃發(fā)展。1.5Bycarefulchemicalcompositionandarrangement,itispossibletocreateaverysmalltransistordirectlyonalayerofsilicon,usingvarioustechnologiestomanipulatethematerialintothecorrectform.Thesetransistorsaresmall,fastandreliable,anduserelativelylittlepower.通過精密的化學合成和設計、運用多種材料處理技術(shù)，可以在硅層上直接構(gòu)造極小的晶體管。這種晶體管體積小、速度快、功能可靠，耗能也少。2.1Memoriescanbemadeinmechanical,magnetic,optical,biologicalandelectronictechnologies.Examplesofmagneticmemoriesaretapes,floppydisks,harddrivesandferroelectricRAMs.ExamplesofopticalmemoriesareCD-ROMs,rewritableCDs.Electronicmemoryisusedextensivelyincomputerequipmentsinceitisthefastestavailable.制造存儲器件，可采用機械技術(shù)、磁技術(shù)、光技術(shù)、生物技術(shù)和電子技術(shù)。軟盤、硬盤和鐵電隨機存儲器屬于磁存儲器件。光存儲器件有只讀光盤、可寫光盤。在計算機設備中，廣泛使用的是電子存儲器件，因為它是當前速度最快的存儲器件。2.5SRAMcomesinmanyspeedclasses,rangingfromseveralnsforcacheapplicationsto200nsforlowpowerapplications.SRAMexistsinbothbipolarandMOStechnology.CMOS[3]technologyboaststhehighestdensityandthelowestpowerconsumption.FastcachememorycanbeconstructedinBiCMOStechnology,ahybridtechnologythatusesbipolartransistorsforextradrive.ThefastestSRAMmemoriesareavailableinECL(EmitterCoupledLogic)bipolartechnology.Becauseofthehighpowerconsumption,thememorysizeislimitedinthistechnology.SRAM的速度等級很多：從高速緩存的幾個納秒到低速應用的200ns。雙極性SRAM和MOSSRAM現(xiàn)在都有。CMOS技術(shù)的優(yōu)勢在于密度最高、功耗最低。高速緩存可以使用BiCMOS技術(shù)構(gòu)建；BiCMOS是一種混合技術(shù)，它使用雙極性晶體管作為附加的驅(qū)動。采用“射極耦合邏輯”（ECL）雙極性技術(shù)的SRAM具有最快的速度。由于這種技術(shù)的功耗高，所以存儲器容量受到限制。2.10TheadvantageofROMisthatitcanbemanufacturedatthelowestpriceinhighvolumes.Anotheradvantageinsomeapplicationsisthatitisimpossibletoalterthedataoncethechipsaremade,andthatnofurtherprogrammingandtestingarerequired.Ontheotherhand,ifthedataorcodemustbechangedthiscanbeasmalldisaster.Therestofthechipswillendinthedustbinandnewchipswillhavetobemade.ROM的優(yōu)點是量產(chǎn)價格最低。對于某些應用來說，ROM還具備另外一個優(yōu)點——當芯片制造出來后，其中的數(shù)據(jù)就不能再改了，也就不需要進一步編程、測試了。但是，假如數(shù)據(jù)或代碼非改不可的話，那么采用ROM就是大錯特錯。剩余的ROM芯片只好丟進垃圾桶，還得重新制造芯片。3.14ROMstandsforread-onlymemory.AROMchipisprogrammedwithapermanentcollectionofpre-setbytes.TheaddressbustellstheROMchipwhichbytetogetandplaceonthedatabus.WhentheRDlinechangesstate,theROMchippresentstheselectedbyteontothedatabus.ROM是指“只讀存儲器”。ROM芯片是用一組預設字節(jié)編程得到的。地址總線告知ROM芯片要將哪個字節(jié)取出并置于數(shù)據(jù)總線上。當RD信號線改變狀態(tài)時，ROM芯片將選中的字節(jié)輸出到數(shù)據(jù)總線上。3.15RAMstandsforrandom-accessmemory.RAMcontainsbytesofinformation,andthemicroprocessorcanreadorwritetothosebytesdependingonwhethertheRDorWRlineissignaled.Oneproblemwithtoday'sRAMchipsisthattheyforgeteverythingoncethepowergoesoff.ThatiswhythecomputerneedsROM.RAM是指“隨機存取存儲器”。RAM中包含著以字節(jié)為單位的信息，微處理器能夠依據(jù)RD/WR信號哪個有效來決定字節(jié)的讀/寫。當前RAM芯片的一個問題是：掉電后，所有保存在RAM上的內(nèi)容全部丟失。這就是計算機需要ROM的原因。3.21Moretransistorsalsoallowforatechnologycalledpipelining[6].Inapipelinedarchitecture,instructionexecutionoverlaps.Soeventhoughitmighttakefiveclockcyclestoexecuteeachinstruction,therecanbefiveinstructionsinvariousstagesofexecutionsimultaneously.Thatwayitlookslikeoneinstructioncompleteseveryclockcycle.有了更多的晶體管，就可以使用流水線技術(shù)。在流水線結(jié)構(gòu)中，指令的執(zhí)行是重疊的。盡管執(zhí)行每條指令可能需要5個周期，卻可以在不同階段同時執(zhí)行5條指令。這樣看上去好像每個周期都能完成一條指令。3.22Manymodernprocessorshavemultipleinstructiondecoders,eachwithitsownpipeline.Thisallowsformultipleinstructionstreams,whichmeansthatmorethanoneinstructioncancompleteduringeachclockcycle.Thistechniquecanbequitecomplextoimplement,soittakeslotsoftransistors.許多現(xiàn)代處理器有多個指令譯碼器，而每個指令譯碼器都有各自的流水線。這樣，就可以實現(xiàn)“多指令流”——在一個周期內(nèi)完成多條指令。“多指令流”技術(shù)實現(xiàn)起來相當復雜，需要使用大量晶體管。4.8aThefirstsignalconditioningopampswereconstructedwithvacuumtubespriortotheintroductionoftransistors,sotheywerelargeandbulky.Duringthe1950s,miniaturevacuumtubesthatworkedfromlowervoltagepowersuppliesenabledthemanufactureofopampsthatshrunktothesizeofabrickusedinhouseconstruction,sotheopampmoduleswerenicknamedbricks.Vacuumtubesizeandcomponentsizedecreaseduntilanopampwasshrunktothesizeofasingleoctalvacuumtube.在晶體管出現(xiàn)前，第一個用于信號調(diào)理的運放是用真空管構(gòu)建的，因此它的體積很大。20世紀50年代，低電壓工作的小型真空管使運放的體積縮小到一塊磚的大小，因此運放模塊有了個綽號“磚塊”。真空管和元器件體積不斷縮小，直至運放縮至一只八腳真空管的大小。4.8bTransistorswerecommerciallydevelopedinthe1960s,andtheyfurtherreducedopampsizetoseveralcubicinches.Mostoftheseearlyopampsweremadeforspecificapplications,sotheywerenotnecessarilygeneralpurpose.Theearlyopampsservedaspecificpurpose,buteachmanufacturerhaddifferentspecificationsandpackages;hence,therewaslittlesecondsourcingamongtheearlyopamps.在20世紀60年代，晶體管實現(xiàn)了商業(yè)開發(fā)，這進一步將運放的體積減至幾立方英寸。早期運放大多是為特定應用制造的，所以它們不一定通用；早期運放是為某種特定應用服務的，而每個生產(chǎn)商制定的技術(shù)指標和封裝都各不相同；所以，早期運放幾乎都不存在另外的貨源。6.2aTheflashconverteroperatesbysimultaneouslypresentingtheinputsignaltoabankof2N–1comparators,whosereferencevoltagesaresetbyaresistorchaintoexactlycorrespondtoallofthepossiblesamplelevelswhichcanberepresentedbytheconverter.Theoutputfromeachcomparator(eithera1ora0)isthenencodedintoanN-bitwordrepresentingtheinputsamplelevel.閃式ADC將輸入信號同時置于一列（2N-1個）比較器之前，比較器的參考電壓由一組電阻設定，參考電壓精確對應于轉(zhuǎn)換器能代表的全部采樣電壓。比較器的輸出（0或1）被編碼成N位碼字以代表輸入采樣信號電平。6.2bTheflashconverteristhemostsimple,mostintuitiveandalsothefastestsolutionforADCimplementation.Forlargenumbersofbits(e.g.>14bits),thenumberofresistorsneeded(2N–1)becomesprohibitivelylargeformostpracticalapplications.Also,thepowerconsumptionisconsiderablyhigherthansomeoftheslightlyslowerandmoreexoticsolutions.閃式ADC是最簡單、最直觀和最快速的ADC實現(xiàn)方案。對于多數(shù)實際應用而言，當位數(shù)較多時（如大于14位），所需的電阻數(shù)量就太大了。與一些速度稍慢、特殊的模數(shù)轉(zhuǎn)換方案相比，閃式ADC的功耗明顯要高。7.1Everynewelectronicproduct,exceptthosethatarebatterypowered,requiresconvertingoff–line115Vacor230Vacpowertosomedcvoltageforpoweringtheelectronics.Efficientconversionofelectricalpowerisbecomingaprimaryconcerntocompaniesandtosocietyasawhole.Switchingpowersuppliesoffernotonlyhigherefficienciesbutalsooffergreaterflexibilitytothedesigner.Recentadvancesinsemiconductor,magneticandpassivetechnologiesmaketheswitchingpowersupplyanevermorepopularchoiceinthepowerconversionarenatoday.除了電池供電的電子產(chǎn)品外，新型電子產(chǎn)品都需要將115V或230V交流電源轉(zhuǎn)換為直流電源為電路供電。而電能轉(zhuǎn)換效率正在成為業(yè)界以及整個社會關注的重點。開關電源不僅提供了較高的轉(zhuǎn)換效率，而且為設計者提供了更大的靈活性。半導體技術(shù)、磁器件和無源器件技術(shù)的發(fā)展使開關電源在當今功率轉(zhuǎn)換的舞臺上成為日益流行的選擇。8.2ACrystalisabasicpiezoelectricquartzcrystal.Onitsown,itcannotgenerateelectricalclocks.Ithastobeconnectedtoaclockoscillatortogetaclockwaveform.Therearetwokindsofcrystals;SeriesResonant,whichcanbemodeledasahighQseriesL-Ccircuit,andParallelResonant,whichcanbemodeledasahighQparallelL-Ccircuit.Theseriesresonantcrystalhasminimumimpedanceattheresonatingfrequency,whiletheparallelresonantcrystalhasmaximumimpedanceattheresonatingfrequency.晶體是一種基本的壓電石英晶體。它本身是不能產(chǎn)生時鐘信號的，必須和時鐘振蕩器連接在一起才能得到時鐘波形。晶體有兩種：串聯(lián)諧振晶體（可視作高品質(zhì)因數(shù)的串聯(lián)LC電路）和并聯(lián)諧振晶體（可視作高品質(zhì)因數(shù)的并聯(lián)LC電路）。串聯(lián)諧振晶體在諧振頻率點的阻抗最小，而并聯(lián)諧振晶體在諧振頻率點的阻抗最大。9.2Signalintegrityisdefinedbylossofqualityoftheinputsignal.Ideally,thesignalattheoutputofaninterconnectshouldbeequalinallcharacteristicswiththesignalattheinputoftheinterconnect.Inreality,signaldegradationoccurs.Theusermustdefinewhatlevelofdegradationisacceptableor,alternatively,mustdefineminimumacceptablesignallevelsattheoutput.“信號完整性”是指輸入信號的質(zhì)量損失。在理想情況下，互連部件輸出端信號的所有特性和輸入端信號完全相同。在實際當中，輸出端信號質(zhì)量會下降。用戶必須明確可接受的質(zhì)量下降程度，或者必須定義輸出端信號最小可接受電平。9.3Intoday’sdesigns,withclockratesover100MHzandrisetimescommonly1nsorless,designerscannotignoretheroleinterconnectionsplayinalogicdesign.Interconnecteffectscanplayasignificantpartinthetimingandnoisecharacteristicsofacircuit.Thefasterclockratesandrisetimesincreasebothcapacitiveandinductivecouplingeffects,whichmakescrosstalkproblemsgreater.今天，時鐘速率超過100MHz，上升時間通常為1ns以下；設計者不能無視互連部件對邏輯設計的影響。對電路的時序特性和噪聲特性，互連部件都有顯著的影響。時鐘速率和上升時間的加快增加了容性耦合效應和感性耦合效應，這使得串擾問題更加嚴重。9.6Twotypesofcrosstalkcanbegenerated:backwardcrosstalkandforwardcrosstalk.Backward,alsocallednear-endcrosstalk,ismeasuredatthedrivingendoftheconnectorandrepresentsthesumofthecapacitiveandinductivecoupling.Forward,alsocalledfar-endcrosstalk,ismeasuredatthereceivingendoftheconnectorandrepresentscapacitiveminusinductivecoupling.串擾分成“后向串擾”和“前向串擾”兩類?！昂笙虼當_”也叫“近端串擾”，它在連接器的驅(qū)動端進行測量，代表了容性耦合和感性耦合之和?！扒跋虼當_”也叫“遠端串擾”，它在連接器的接收端進行測量，代表了容性耦合和感性耦合之差。10.1Wirelesstelephonescomeintwobasicvarieties:cordlessphonesandmobilephones(sometimescalledcellphones).Cordlessphonesaredevicesconsistingofabasestationandahandsetsoldasasetforusewithinthehome.Theseareneverusedfornetworking.Mobilephoneshavegonethroughthreedistinctgenerations,withdifferenttechnologies:(1)Analogvoice(2)Digitalvoice(3)Digitalvoiceanddata.無線移動電話分為兩大類：無繩電話和移動電話。無繩電話由基站和室內(nèi)手持設備組成。無繩電話不支持網(wǎng)絡傳輸。移動電話的發(fā)展經(jīng)歷了三個時期，各有不同的技術(shù)：（1）模擬語音（2）數(shù)字語音（3）數(shù)字語音和數(shù)據(jù)。10.Inallmobilephonesystems,ageographicregionisdividedupintocells,whichiswhythedevicesaresometimescalledcellphones.InAMPS,thecellsaretypically10to20kmacross;indigitalsystems,thecellsaresmaller.Eachcellusessomesetoffrequenciesnotusedbyanyofitsneighbors.Thekeyideathatgivescellularsystemsfarmorecapacitythanprevioussystemsistheuseofrelativelysmallcellsandthereuseoftransmissionfrequenciesinnearby(butnotadjacent)cells.在移動電話系統(tǒng)中，地理區(qū)域分成一個個蜂窩狀的小區(qū)。這就是“移動電話”也稱作“蜂窩電話”的原因。在AMPS系統(tǒng)中，蜂窩小區(qū)的典型大小為10～20km；在數(shù)字系統(tǒng)中，蜂窩小區(qū)要小一些。每個小區(qū)使用一組特定的頻率，這組頻率在其臨近的任何小區(qū)都不能使用。使蜂窩系統(tǒng)具備很大容量的關鍵在于使用了較小的蜂窩小區(qū)和在附近（但不是臨近的）小區(qū)重復使用頻率。11.AGSMsystemhas124pairsofsimplexchannels.Eachsimplexchannelis200kHzwideandsupportseightseparateconnectionsonit,usingtimedivisionmultiplexing.Eachcurrentlyactivestationisassignedonetimeslotononechannelpair.Theoretically,992channelscanbesupportedineachcell,butmanyofthemarenotavailable,toavoidfrequencyconflictswithneighbouringcells.GSM系統(tǒng)擁有124對單工信道。每個單工信道帶寬為200kHz，并以時分復用的方式提供了8路獨立連接。每個正在使用的基站都會分配到頻率對上的一個時隙。從理論上講，每個蜂窩小區(qū)可以支持992個信道；但為了避免和鄰近蜂窩小區(qū)發(fā)生頻率沖突，許多信道并不能使用。12.2APCisageneral-purposetoolbuiltaroundamicroprocessor.Ithaslotsofdifferentparts-memory,aharddisk,amodem,etc.-thatworktogether."Generalpurpose"meansthatyoucandomanydifferentthingswithaPC.Youcanuseittotypedocuments,sende-mail,browsetheWebandplaygames.PC是一種以微處理器為中心的通用工具。它由存儲器、硬盤、調(diào)制解調(diào)器等很多不同的部件共同構(gòu)成。所謂“通用”是指使用PC可以做許多不同的事情。既可以用它錄入文件，也可以用它發(fā)送電子郵件、瀏覽網(wǎng)頁和玩游戲。12.16TheBIOSissoftwarestoredonaflashmemorychip.InaPC,theBIOSisembeddedonthemotherboard.Occasionally,aPCmanufacturerwillreleaseanupdatefortheBIOS,andyoucancarefullyfollowinstructionsto"flashtheBIOS"withtheupdatedsoftware.BIOS是儲存在閃存芯片中的軟件。閃存芯片嵌在PC的主板上。有時候，PC制造商會發(fā)布BIOS更新，你可以按照說明“刷新BIOS”。12.19bThePOSTisasmallcomputerprogramwithintheBIOSthatchecksforhardwarefailures.AsinglebeepafterthePOSTsignalsthateverything'sokay.Otherbeepsequencessignalahardwarefailure,andPCrepairspecialistscomparethesesequenceswithacharttodeterminewhichcomponenthasfailed.POST是BIOS中的硬件故障檢測程序。如果一切正常，蜂鳴器就會鳴叫一聲。如果蜂鳴器發(fā)出其他聲響，就說明出現(xiàn)了硬件故障。根據(jù)鳴叫情況，PC維修人員對照圖表判定哪個部件出現(xiàn)了故障。13.4bTwoHDLsareincommonusagetoday:VerilogandVHDL(VHSICHardwareDescriptionLanguage,whereVHSICstandsforVeryHighSpeedIntegratedCircuit).StandardHDLsareimportantbecausetheycanbeusedbydifferentCADtoolsfromdifferenttoolvendors.InthedaysbeforeVerilogandVHDL,everytoolhaditsownHDL,requiringlaborioustranslationbetweenHDLs,forexample,toverifytheoutputfromasynthesistoolwithanothervendor'ssimulator.Verilog和VHDL（VHSIC硬件描述語言，VHSIC代表超高速集成電路）是兩種廣泛應用的硬件描述語言。標準化HDL是很重要的，因為標準化語言可以被不同生產(chǎn)商提供的不同CAD工具使用。在Verilog和VHDL出現(xiàn)之前，每個CAD工具都有自己的HDL。在不同HDL之間進行轉(zhuǎn)換（例如，使用其他模擬器來驗證某個綜合工具的輸出）既費時又費力。13.5Thebasicbuildingblocksofdigitalcircuitsaregates.Agateisanelectroniccomponentwithanumberofinputsand,generally,asingleoutput.Theinputsandtheoutputsarenormallyinoneoftwostates:logic0orlogicl.Theselogicvaluesarerepresentedbyvoltages(forinstance,0Vforlogic0and3.3Vforlogic1)orcurrents.Thegateitselfperformsalogicaloperationusingallofitsinputstogeneratetheoutput.門電路是構(gòu)成數(shù)字電路的基本模塊。門電路是由幾個輸入和（通常情況下）一個輸出組成的電子器件。在通常情況下，輸入和輸出是“邏輯0”、“邏輯1”兩狀態(tài)之一。邏輯值可以由電壓（例如，0V代表“邏輯0”，3.3V代表“邏輯1”）或電流來表示。門電路利用全部輸入實現(xiàn)某種邏輯運算以產(chǎn)生輸出。14.3aThe“fieldprogrammable”portionoftheFPGA’snamereferstothefactthatitsprogrammingtakesplace“inthefield”(asopposedtodeviceswhoseinternalfunctionalityishardwiredbythemanufacturer).ThismaymeanthatFPGAsareconfiguredinthelaboratory,oritmayrefertomodifyingthefunctionofadeviceresidentinanelectronicsystemthathasalreadybeendeployedintheoutsideworld.FPGA名稱中的“現(xiàn)場可編程”是指研發(fā)人員“在現(xiàn)場”對FPGA編程，而不是由芯片制造商以“硬連線”方式實現(xiàn)器件的內(nèi)部功能。也就是說，可以在實驗室對FPGA進行配置，也可以對“已投入使用的”電子系統(tǒng)中的FPGA進行配置。15.2aVHDLisalsoageneral-purposeprogramminglanguage:justashigh-levelprogramminglanguagesallowcomplexdesignconceptstobeexpressedascomputerprograms,VHDLallowsthebehaviorofcomplexelectroniccircuitstobecapturedintoadesignsystemforautomaticcircuitsynthesisorforsystemsimulation.VHDL是一種通用編程語言。和其他高級編程語言一樣，VHDL將復雜的設計概念表達為計算機程序；為了實現(xiàn)電路自動綜合或系統(tǒng)仿真，VHDL可將復雜電子電路的行為輸入到一個設計系統(tǒng)中。16.1bAnalogsignalsarerealworldsignalsthatweexperienceeveryday-sound,light,temperature,andpressure.Adigitalsignalisanumericalrepresentationoftheanalogsignal.Itmaybeeasierandmorecosteffectivetoprocessthesesignalsinthedigitalworld.我們天天遇到的現(xiàn)實世界信號都是模擬信號——如聲音、光、溫度和壓力。數(shù)字信號是模擬信號的數(shù)值表示。在數(shù)字世界里，對這些信號進行處理可能會更容易、成本更低。16.12bADSPisatypeofmicroprocessor-onethatisincrediblyfastandpowerful.Itisuniquebecauseitprocessesdatainrealtime.Thisreal-timecapabilitymakesaDSPperfectforapplicationsthatcannottolerateanydelays.“數(shù)字信號處理器”是一種速度極快、功能強大的微處理器。DSP與眾不同之處在于它能夠?qū)崟r處理數(shù)據(jù)。實時處理能力使DSP非常適合于那些不容許任何延遲的應用。17.7DSPscanbepurchasedinthreeforms,asacore,asaprocessor,andasaboardlevelproduct.InDSP,theterm"core"referstothesectionoftheprocessorwherethekeytasksarecarriedout,includingthedataregisters,multiplier,ALU,addressgenerator,andprogramsequencer.Acompleteprocessorrequirescombiningthecorewithmemoryandinterfacestotheoutsideworld.Whilethecoreandtheseperipheralsectionsaredesignedseparately,theywillbefabricatedonthesamepieceofsilicon,makingtheprocessorasingleintegratedcircuit.購買DSPs有三種形式：購買內(nèi)核、購買處理器和購買板級產(chǎn)品。在DSPs中，內(nèi)核是指處理器中運行關鍵任務的部分；它包括數(shù)據(jù)寄存器、乘法器、算術(shù)邏輯單元、地址產(chǎn)生器和程序定序器。一個完整的處理器需要將內(nèi)核、存儲器和外部接口組合起來。盡管內(nèi)核設計和片內(nèi)外設設計是分別進行的，但是卻被制作在同一片硅片上；這樣，處理器就能成為單片集成電路。18.4bItisimpossibletoprocessreal-worldanalogsignalsusingpurelydigitaltechniques,sinceallsensors(microphones,thermocouples,straingages,piezoelectriccrystals,diskdriveheads,etc.)areanalogsensors.Therefore,somesortofsignalconditioningcircuitryisrequiredinordertopreparethesensoroutputforfurthersignalprocessing,whetheritbeanalogordigital.單靠純數(shù)字技術(shù)是不能完成處理現(xiàn)實世界模擬信號的任務的，因為所有傳感器（話筒、熱偶、壓力感應器、壓電晶體、磁盤驅(qū)動器頭等）都是模擬的。因此，為了使傳感器的輸出信號能夠進一步地進行信號處理（不論模擬信號處理，還是數(shù)字信號處理），就需要某種形式的“信號調(diào)理電路”。20.3Perceptualcodingexploitscertainflawsinthehumanauditorysystemtoencodeasignalinsuchawaythatitsoundsthesametoahumanlistener,evenifitlooksquitedifferentonanoscilloscope.Perceptualcodingisbasedonthescienceofpsychoacoustics—howpeopleperceivesound.MP3isbasedonperceptualcoding.知覺編碼利用了人類聽覺系統(tǒng)的缺陷，采用讓人耳聽不出來差別的方式對信號進行編碼，盡管在示波器上觀看重放波形差別很大。知覺編碼技術(shù)是建立在心理聲學基礎之上的。心理聲學研究的是人類感知聲音的方式。MP3建立在知覺編碼基礎之上。22.1Adigitalimageismadeupofmanyrowsandcolumnsofpixels.Forgrayscaleimages,eachpixelisassignedanumberthatrepresentsthegrayshadeassignedtothatpixel.Thelargerthenumberofpixelsinanimage,andthelargerthenumberofavailablegrayscalelevels,thebettertheresolutionoftheimage.一幅數(shù)字圖像是由多行多列像素組成的。對灰度圖像而言，每個像素被賦予一個代表其灰度級的數(shù)字。一幅圖像擁有的像素越多，可用灰度級越多，這幅圖像的分辨率就越高。22.11bLosslesscompressionmeansthatafileiscompactedwithoutlosinganyinformation,sothatthereconstructedfileisidenticaltotheoriginal.Lossycompressionmeansthatsomeinformationfromtheoriginalfileisirretrievablylost,butgenerallythereconstructedfileisextremelyclosetotheoriginal.無損壓縮方法壓縮了文件，卻沒有損失原始文件的任何信息——重建文件和原始文件是完全相同的。有損壓縮是指原始文件中的有些信息永遠丟失了；不過，重建文件和原始文件非常相近。23.1Justlikeaconventionalcamera,adigitalcamerahasaseriesoflensesthatfocuslighttocreateanimageofascene.Butinsteadoffocusingthislightontoapieceoffilm,itfocusesitontoasemiconductordevicethatrecordslightelectronically.Amicroprocessorthenbreaksthiselectronicinformationdownintodigitaldata.和常規(guī)相機一樣，數(shù)碼相機也是通過一組透鏡將光線聚集并形成景物的像。不過，數(shù)碼相機并不將光線聚集在膠片上，而是將光線聚集在半導體器件上，這些半導體器件以電信號的形式存儲光信號。然后，微處理器把電信息轉(zhuǎn)換成數(shù)字數(shù)據(jù)。24Standardtelevisionusesaninterlacedformattoreduceflickerinthedisplayedimage.Thismeansthatalltheoddlinesofeachframearetransmittedfirst,followedbytheevenlines.Thegroupofoddlinesiscalledtheoddfield,andthegroupofevenlinesiscalledtheevenfield.Sinceeachframeconsistsoftwofields,thevideosignaltransmits60fieldspersecond.標準電視信號采用交錯形式來減少畫面的閃爍。也就是說，首先發(fā)送一幀畫面全部的奇數(shù)線，然后發(fā)送偶數(shù)線。奇數(shù)線組被稱作“奇數(shù)場”，而偶數(shù)線組被稱為“偶數(shù)場”。每一幀由兩場組成，因此視頻信號每秒發(fā)送60場。25.3dModernx86partsandtheirsupportchipsareveryhigh-speeddevicesindensepackages.Itisvirtuallyimpossibletohand-prototypeyourowndesignbasedaroundtheseparts;unlessyouwanttospendmanythousandsofdollarsonequipment,attheveryleastyouwillhavetocontractoutsomeassemblywork.現(xiàn)代x86器件及其支撐芯片都是高密度封裝形式的高速器件。實際上，不可能以這種器件為基礎手工設計樣機；除非您想在設備上投入數(shù)萬美元，但也不得不將其中某些裝配工作承包出去。25.7eSinceARMprovidesreferencedesignsformanydifferentperipheralsaswellasthecoreitself,thereareoftensimilaritiesinperipheralcontrolondifferentARMimplementations,evenfromdifferentvendors.Totakeatrivialexample,codetosenddataoutofaserialportcanusuallybeportedfromoneARMvarianttoanotherwithlittleeffort.ARM不僅提供了處理器內(nèi)核的參考設計，而且提供了許多不同外設的參考設計；因此，在外設控制方面，不同的ARM實現(xiàn)方案（甚至是來自不同廠商的ARM實現(xiàn)方案）往往具有相似性。舉個小例子，通?？梢圆辉趺促M力地就把一個用于串口數(shù)據(jù)發(fā)送的代碼從一個ARM器件移植到另一個ARM器件。26.2VerilogandVHDLarethemostpopularlanguagesforhardwaredescriptionandmodeling.Eachhardwaredescriptionlanguage(HDL)modelssystemswithdiscrete-eventsemanticsthatignoreidleportionsofthedesignforefficientsimulation.Bothdescribesystemswithstructuralhierarchy:asystemconsistsofblocksthatcontaininstancesofprimitives,otherblocks,orconcurrentprocesses.Inaddition,eachHDLexplicitlylistsconnections.Verilog和VHDL是最常用的硬件描述和建模語言。每一種“硬件描述語言”（HDL）都采用了（為高效仿真而忽略設計空閑部分的）離散事件語法對系統(tǒng)進行建模。這兩種語言都使用了具有結(jié)構(gòu)化層次的描述系統(tǒng)——將一個系統(tǒng)分成若干模塊。系統(tǒng)模塊包含了基本元件實例、其他模塊和并發(fā)進程。此外，每種HDL將這些連接都明確羅列出來。26.20Manyembeddedsystemsuseareal-timeoperatingsystem(RTOS)tosimulatecon-currencyonasingleprocessor.AnRTOSmanagesmultiplerunningprocesses,eachwritteninasequentiallanguagesuchasC.Theprocessesperformthesystem'scomputationsandtheRTOSschedulesthem.Theschedulingattemptstomeetdeadlinesbydecidingwhichprocessesrunatwhattimesandinwhatorder.許多嵌入式系統(tǒng)使用“實時操作系統(tǒng)”（RTOS）來模擬單片處理器的并發(fā)性。RTOS管理多個正在運行的進程，每個進程都是用C語言這樣的順序執(zhí)行語言編寫的。進程完成系統(tǒng)的運算，而RTOS對它們進行調(diào)度。為了滿足時限要求，調(diào)度機制將決定哪個進程何時、以何種順序執(zhí)行。27.5Interruptlatencyisthetotallengthoftimefromaninterruptsignalarrivingattheprocessortothestartoftheassociatedinterruptserviceroutine(ISR).Whenaninterruptoccurs,theprocessormusttakeseveralstepsbeforeexecutingtheISR.First,theprocessormustfinishexecutingthecurrentinstruction.Next,theinterrupttypemustberecognized.Thisisdonebythehardwareanddoesnotsloworsuspendtherunningtask.Finally,andonlyifinterruptsareenabled,theCPU’scontextissavedandtheISRassociatedwiththeinterruptisstarted.“中斷反應時間”是指從中斷信號到達處理器到“中斷服務程序”（ISR）開始運行之間的全部時間。當中斷出現(xiàn)時，在執(zhí)行ISR之前，處理器必須完成以下幾步。首先，處理器必須停止正在執(zhí)行的指令。然后，必須辨認中斷類型。這是由硬件完成的，不會減慢或掛起正在運行的任務。最后，只有當中斷使能、CPU環(huán)境設置被保存之后，相關的ISR才會啟動執(zhí)行。28.6Unlessyou’reworkingwithapurelyDCcircuit,yourcircuitislikelytorequiresomekindofACstimulussignalasyouevaluatecomponents,functionalblocks,andsubsystems.Thewaveformfromthesignalsourceemulatesasignalcominginfromtheoutsideworld,suchasasensoroutput.Similarly,itcanbeusedasastand-inforwaveformsthatwillappearinas-yet-unavailablepartsofthecircuitdesign.當對元器件、功能模塊和子系統(tǒng)進行驗證時，電路中很可能需要某種類型的交流激勵源，除非你只使用純直流電路。信號源輸出的波形模擬了來自外部世界的信號（如傳感器輸出信號）。同樣，信號源還可用于替代電路設計中尚未完成部分所產(chǎn)生的波形。29.6Oscilloscopescanbeclassifiedsimilarly–asanaloganddigitaltypes.Formanyapplications,eitherananalogordigitaloscilloscopewilldo.However,eachtypehasuniquecharacteristicsthatmaymakeitmoreorlesssuitableforspecificapplications.Digitaloscilloscopescanbefurtherclassifiedintodigitalstorageoscilloscopes(DSOs),digitalphosphoroscilloscopes(DPOs)andsamplingoscilloscopes.示波器也有類似的分類——模擬示波器和數(shù)字示波器。對很多應用而言，二者都可勝任。然而，它們也有各自獨特之處；對特定應用而言，這些獨特之處可能使之更適用，也可能使之不很適用。數(shù)字示波器還可進一步分為“數(shù)字存儲示波器”（DSO）、“數(shù)字熒光示波器”（DPO）和“采樣示波器”三類。29.14Incontrasttoananalogoscilloscope,adigitaloscilloscopeusesanADCtoconvertthemeasuredvoltageintodigitalinformation.Itacquiresthewaveformasaseriesofsamples,andstoresthesesamplesuntilitaccumulatesenoughsamplestodescribeawaveform.Thedigitaloscilloscopethenre-assemblesthewaveformfordisplayonthescreen.Digitaloscilloscopescanbeclassifiedintodigitalstorageoscilloscopes(DSOs),digitalphosphoroscilloscopes(DPOs),andsamplingoscilloscopes.與模擬示波器不同，數(shù)字示波器采用“模數(shù)轉(zhuǎn)換器”（ADC）將被測電壓轉(zhuǎn)換為數(shù)字信息。數(shù)字示波器采集到的波形是一組樣本，并將這些樣本保存，直至樣本數(shù)達到足以描述波形的數(shù)量。之后，數(shù)字示波器將這些樣本重新組合、在示波器顯示屏上顯示。數(shù)字示波器可分為“數(shù)字存儲示波器”（DSO）、“數(shù)字熒光示波器”（DPO）和采樣示波器。30.8Theimpedanceofthelogicanalyzer’sprobes(capacitance,resistance,andinductance)becomespartoftheoverallloadonthecircuitbeingtested.Allprobesexhibitloadingcharacteristics.ThelogicanalyzerprobeshouldintroduceminimalloadingontheSUT,andprovideanaccuratesignaltothelogicanalyzer.邏輯分析儀探頭的阻抗（電容、電阻和電感）會成為整個被測電路負載的一部分。所有探頭都會表現(xiàn)出負載特性。邏輯分