USB接口在單片機(jī)通信中的設(shè)計應(yīng)用分析研究 計算機(jī)科學(xué)與技術(shù)專業(yè)

USB接口在單片機(jī)通信中的設(shè)計應(yīng)用[摘要]51系列芯片的串口通信速率較低,會在其串口通信中形成一個速度瓶頸。通用串行總線(USB)作為一種新的微機(jī)總線接口規(guī)范，具有便捷、易擴(kuò)展、低成本、低干擾等特點(diǎn)，非常適合作為主機(jī)和外設(shè)之間的通信接口。本文介紹了一種比較簡單方便設(shè)計USB設(shè)備的方法，設(shè)計采用51單片機(jī)和USB接口芯片組成的單片機(jī)最小系統(tǒng)來實(shí)現(xiàn)一個完整的USB設(shè)備，大大提高了通信速率。在設(shè)計中，采用的控制器是51單片機(jī)AT89S52，USB電氣接口則是PHILIPS公司的USB接口芯片PDIUSBD12。單片機(jī)控制器作為下位機(jī)，通過USB電氣接口芯片和USB總線與PC機(jī)交換數(shù)據(jù)，并實(shí)現(xiàn)USB設(shè)備的邏輯功能。系統(tǒng)開發(fā)的最終硬件成果是一個帶有USB接口的設(shè)備，通過USB電纜與PC機(jī)相連接，能夠?qū)崿F(xiàn)主機(jī)對設(shè)備的列舉，以及和PC機(jī)交換數(shù)據(jù)，并實(shí)現(xiàn)其擴(kuò)展功能。[關(guān)鍵詞]USB；單片機(jī)系統(tǒng)；PDIUSBD12；AT89S52；接口技術(shù)USBinterfaceinthedesignofcommunication[Abstract]Thecommunicationrateoftheseries51chipisloweranditformsatarebottleneckinserialcommunication.ThispaperintroducedasimpleandconvenientmethodtodesignaUSBapparatus,thatistosay,torealizeanintactUSBapparatuswithaminimumsystemofsingle-chipcomputerthatmadeof51single-chipcomputerandUSBinterface,thecircuitgreatlyimprovescommunicationrate.Inthissystem,Iadopted51one-chipcomputersAT89S52asitscontroller,thechipPDIUSBD12ofPHILIPSCompanyasitselectricinterface.Theone-chipcomputerasthenextmachine,exchangesthedatawiththePC,throughtheUSBbusandUSBelectricinterfacechip,anditrealizesthelogicfunctionofUSBapparatus.ItcanexchangedatawithPC,andrealizeitsexpandingfunction,throughconnectingwithPC.[Keywords]single-chipcomputersystem；interfacetechnology；PDIUSBD12；AT89S52；USB目錄TOC\o"1-4"\u0引言 附錄二：程序#include<reg51.h>/*specialfunctionregisterdeclarations*/#include"mainloop.h"#include"d12ci.h"#include"absacc.h"#include"epphal.h"#defineD12_DATA0xff02#defineD12_COMMAND0xff03externEPPFLAGSbEPPflags;//設(shè)置地址使能voidD12_SetAddressEnable(unsignedcharbAddress,unsignedcharbEnable){ if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,0xD0);//輸出指令 if(bEnable) bAddress|=0x80; outportb(D12_DATA,bAddress);//設(shè)置地址if(bEPPflags.bits.in_isr==0) ENABLE;}//設(shè)置端點(diǎn)使能voidD12_SetEndpointEnable(unsignedcharbEnable){ if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,0xD8);//輸出指令 if(bEnable) outportb(D12_DATA,1);//設(shè)置端點(diǎn)允許 else outportb(D12_DATA,0);//設(shè)置端點(diǎn)禁止if(bEPPflags.bits.in_isr==0) ENABLE;}//模式設(shè)置voidD12_SetMode(unsignedcharbConfig,unsignedcharbClkDiv){ if(bEPPflags.bits.in_isr==0) DISABLE; outportb(D12_COMMAND,0xF3);//設(shè)置模式 outportb(D12_DATA,bConfig); outportb(D12_DATA,bClkDiv);if(bEPPflags.bits.in_isr==0) ENABLE;}//DMA工作方式設(shè)置voidD12_SetDMA(unsignedcharbMode){ if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,0xFB);//設(shè)置DMA工作方式 outportb(D12_DATA,bMode);if(bEPPflags.bits.in_isr==0) ENABLE;}//讀取中斷寄存器unsignedshortD12_ReadInterruptRegister(void){ unsignedcharb1; unsignedintj;outportb(D12_COMMAND,0xF4);//讀取中斷寄存器 b1=inportb(D12_DATA); j=inportb(D12_DATA);j<<=8; j+=b1;returnj;}//端點(diǎn)選擇unsignedcharD12_SelectEndpoint(unsignedcharbEndp){ unsignedcharc;if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,bEndp);//端點(diǎn)選擇 c=inportb(D12_DATA);if(bEPPflags.bits.in_isr==0) ENABLE;returnc;}//讀取最后傳輸狀態(tài)unsignedcharD12_ReadLastTransactionStatus(unsignedcharbEndp){ outportb(D12_COMMAND,0x40+bEndp);//返回最后傳輸狀態(tài) returninportb(D12_DATA);}//讀取端點(diǎn)狀態(tài)unsignedcharD12_ReadEndpointStatus(unsignedcharbEndp){ unsignedcharc;if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,0x80+bEndp);//讀取端點(diǎn)狀態(tài) c=inportb(D12_DATA);if(bEPPflags.bits.in_isr==0) ENABLE;returnc;}//設(shè)置端點(diǎn)狀態(tài)voidD12_SetEndpointStatus(unsignedcharbEndp,unsignedcharbStalled){ if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,0x40+bEndp);//設(shè)置端點(diǎn)狀態(tài) outportb(D12_DATA,bStalled);if(bEPPflags.bits.in_isr==0) ENABLE;}//傳輸恢復(fù)voidD12_SendResume(void){ outportb(D12_COMMAND,0xF6);//設(shè)置發(fā)送恢復(fù)}//讀取當(dāng)前幀號unsignedshortD12_ReadCurrentFrameNumber(void){ unsignedshorti,j;if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,0xF5);//讀取當(dāng)前幀數(shù)目 i=inportb(D12_DATA); j=inportb(D12_DATA);i+=(j<<8);if(bEPPflags.bits.in_isr==0) ENABLE;returni;}unsignedshortD12_ReadChipID(void){ unsignedshorti,j;if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,0xFD); i=inportb(D12_DATA); j=inportb(D12_DATA); i+=(j<<8);if(bEPPflags.bits.in_isr==0) ENABLE;returni;}//讀取端點(diǎn)數(shù)據(jù)unsignedcharD12_ReadEndpoint(unsignedcharendp,unsignedcharlen,unsignedchar*buf){ unsignedchari,j;if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,endp); if((inportb(D12_DATA)&D12_FULLEMPTY)==0){ if(bEPPflags.bits.in_isr==0) ENABLE; return0; }outportb(D12_COMMAND,0xF0); j=inportb(D12_DATA); j=inportb(D12_DATA);if(j>len) j=len;for(i=0;i<j;i++) *(buf+i)=inportb(D12_DATA);outportb(D12_COMMAND,0xF2);if(bEPPflags.bits.in_isr==0) ENABLE;returnj;}//寫端點(diǎn)unsignedcharD12_WriteEndpoint(unsignedcharendp,unsignedcharlen,unsignedchar*buf){ unsignedchari;if(bEPPflags.bits.in_isr==0) DISABLE;outportb(D12_COMMAND,endp); i=inportb(D12_DATA);outportb(D12_COMMAND,0xF0); outportb(D12_DATA,0); outportb(D12_DATA,len);for(i=0;i<len;i++) outportb(D12_DATA,*(buf+i));outportb(D12_COMMAND,0xFA);if(bEPPflags.bits.in_isr==0) ENABLE;returnlen;}//設(shè)置端點(diǎn)應(yīng)答voidD12_AcknowledgeEndpoint(unsignedcharendp){ outportb(D12_COMMAND,endp); outportb(D12_COMMAND,0xF1); if(endp==0) outportb(D12_COMMAND,0xF2);}//輸出數(shù)據(jù)voidoutportb(unsignedintAddr,unsignedcharData){ *((unsignedcharxdata*)Addr)=Data;}//輸入數(shù)據(jù)unsignedcharinportb(unsignedintAddr){ return*((unsignedcharxdata*)Addr);}#include<stdio.h>#include<string.h>#include<reg51.h>/*specialfunctionregisterdeclarations*/#include"epphal.h"#include"d12ci.h"#include"mainloop.h"#include"usb100.h"externvoidbus_reset(void);externvoidep0_txdone(void);externvoidep0_rxdone(void);externvoidep1_txdone(void);externvoidep1_rxdone(void);externvoidmain_txdone(void);externvoidmain_rxdone(void);externvoiddma_eot(void);/*//*************************************************************************//Publicstaticdata//**************************************************************************/EPPFLAGSbEPPflags;/*ControlendpointTX/RXbuffers*/externCONTROL_XFERControlData;/*ISRstaticvars*/unsignedcharidataGenEpBuf[EP1_PACKET_SIZE];unsignedcharidataEpBuf[EP2_PACKET_SIZE];IO_REQUESTidataioRequest;unsignedcharioSize,ioCount;unsignedlongClockTicks=0;externBOOLbNoRAM;//定時器0中斷處理timer_isr()interrupt1{ DISABLE; ClockTicks++; bEPPflags.bits.timer=1; ENABLE;}//USB中斷處理usb_isr()interrupt0{ DISABLE; fn_usb_isr(); ENABLE;}//USB中斷服務(wù)子程序voidfn_usb_isr(){ unsignedinti_st;bEPPflags.bits.in_isr=1;i_st=D12_ReadInterruptRegister();//讀取中斷寄存器if(i_st!=0){ if(i_st&D12_INT_BUSRESET){ bus_reset();//USB總線服務(wù) bEPPflags.bits.bus_reset=1; }if(i_st&D12_INT_EOT) dma_eot();//DMA傳輸結(jié)束if(i_st&D12_INT_SUSPENDCHANGE) bEPPflags.bits.suspend=1;//掛起改變if(i_st&D12_INT_ENDP0IN) ep0_txdone();//端點(diǎn)0IN中斷 if(i_st&D12_INT_ENDP0OUT) ep0_rxdone();//端點(diǎn)0OUT中斷 if(i_st&D12_INT_ENDP1IN) ep1_txdone();//端點(diǎn)1IN中斷 if(i_st&D12_INT_ENDP1OUT) ep1_rxdone();//端點(diǎn)1OUT中斷 if(i_st&D12_INT_ENDP2IN) main_txdone();//端點(diǎn)2IN中斷 if(i_st&D12_INT_ENDP2OUT) main_rxdone();//端點(diǎn)2OUT中斷 } bEPPflags.bits.in_isr=0;}//總線復(fù)位處理子程序voidbus_reset(void){}//端點(diǎn)0OUT中斷voidep0_rxdone(void){ unsignedcharep_last,i;ep_last=D12_ReadLastTransactionStatus(0);//清中斷標(biāo)志if(ep_last&D12_SETUPPACKET){ //接收到SETUP包 ControlData.wLength=0; ControlData.wCount=0;if(D12_ReadEndpoint(0,sizeof(ControlData.DeviceRequest), (unsignedchar*)(&(ControlData.DeviceRequest)))!=sizeof(DEVICE_REQUEST)){ //SETUP包出錯,返回 D12_SetEndpointStatus(0,1); D12_SetEndpointStatus(1,1); bEPPflags.bits.control_state=USB_IDLE; return; }ControlData.DeviceRequest.wValue=SWAP(ControlData.DeviceRequest.wValue); ControlData.DeviceRequest.wIndex=SWAP(ControlData.DeviceRequest.wIndex); ControlData.DeviceRequest.wLength=SWAP(ControlData.DeviceRequest.wLength); //對控制端點(diǎn)的輸入/輸出進(jìn)行應(yīng)答 D12_AcknowledgeEndpoint(0); D12_AcknowledgeEndpoint(1);ControlData.wLength=ControlData.DeviceRequest.wLength; ControlData.wCount=0;if(ControlData.DeviceRequest.bmRequestType&(unsignedchar)USB_ENDPOINT_DIRECTION_MASK){ //從主機(jī)傳輸數(shù)據(jù) bEPPflags.bits.setup_packet=1; bEPPflags.bits.control_state=USB_TRANSMIT; /*getcommand*/ } else{ if(ControlData.DeviceRequest.wLength==0){ bEPPflags.bits.setup_packet=1; bEPPflags.bits.control_state=USB_IDLE; /*setcommand*/ } else{ if(ControlData.DeviceRequest.wLength>MAX_CONTROLDATA_SIZE){ //接收數(shù)據(jù)長度為0 bEPPflags.bits.control_state=USB_IDLE; D12_SetEndpointStatus(0,1); D12_SetEndpointStatus(1,1); } else{ bEPPflags.bits.control_state=USB_RECEIVE; //設(shè)置接收狀態(tài) } }//setcommandwithdata }//elsesetcommand }//ifsetuppacketelseif(bEPPflags.bits.control_state==USB_RECEIVE){ //接收數(shù)據(jù) i= D12_ReadEndpoint(0,EP0_PACKET_SIZE, ControlData.dataBuffer+ControlData.wCount); ControlData.wCount+=i; if(i!=EP0_PACKET_SIZE||ControlData.wCount>=ControlData.wLength){ //數(shù)據(jù)接收完畢 bEPPflags.bits.setup_packet=1; bEPPflags.bits.control_state=USB_IDLE; } } else{ bEPPflags.bits.control_state=USB_IDLE;//進(jìn)入等待狀態(tài) }}//端點(diǎn)0IN處理voidep0_txdone(void){ shorti=ControlData.wLength-ControlData.wCount; D12_ReadLastTransactionStatus(1);//清中斷標(biāo)志位 if(bEPPflags.bits.control_state!=USB_TRANSMIT) return;//非發(fā)送狀態(tài),返回if(i>=EP0_PACKET_SIZE){ //剩下數(shù)據(jù)大于16字節(jié),發(fā)送16字節(jié) D12_WriteEndpoint(1,EP0_PACKET_SIZE,ControlData.pData+ControlData.wCount); ControlData.wCount+=EP0_PACKET_SIZE; bEPPflags.bits.control_state=USB_TRANSMIT; } elseif(i!=0){ //發(fā)送剩下數(shù)據(jù) D12_WriteEndpoint(1,i,ControlData.pData+ControlData.wCount); ControlData.wCount+=i; bEPPflags.bits.control_state=USB_IDLE; } elseif(i==0){ D12_WriteEndpoint(1,0,0);//發(fā)送完畢,發(fā)送0字節(jié) bEPPflags.bits.control_state=USB_IDLE; }}//DMA結(jié)束處理voiddma_eot(void){}//端點(diǎn)1OUT處理voidep1_txdone(void){ D12_ReadLastTransactionStatus(3);//清中斷標(biāo)志位}//端點(diǎn)1IN處理voidep1_rxdone(void){ unsignedcharlen;D12_ReadLastTransactionStatus(2);//清中斷標(biāo)志位 len=D12_ReadEndpoint(2,sizeof(GenEpBuf),GenEpBuf);//讀取數(shù)據(jù) if(len!=0) bEPPflags.bits.ep1_rxdone=1;//標(biāo)志接收到數(shù)據(jù)}//主端點(diǎn)OUT控制voidmain_txdone(void){// unsignedcharlen,epstatus;D12_ReadLastTransactionStatus(5);//清中斷標(biāo)志位}//主端點(diǎn)IN控制voidmain_rxdone(void){ unsignedcharlen,epstatus;D12_ReadLastTransactionStatus(4);//清中斷標(biāo)志位//接收數(shù)據(jù) len=D12_ReadEndpoint(4,64,EpBuf); epstatus=D12_ReadEndpointStatus(4); epstatus&=0x60; if(epstatus==0x60) len=D12_ReadEndpoint(4,64,EpBuf);//讀取雙緩沖區(qū)數(shù)據(jù)}附錄三：英文原文PDIUSBD12USBinterfacedevicewithparallelbusThePDIUSBD12isacostandfeatureoptimizedUSBdevice.Itisnormallyusedinmicrocontrollerbasedsystemsandcommunicateswiththesystemmicrocontrolleroverthehigh-speedgeneralpurposeparallelinterface.ItalsosupportslocalDMAtransfer.ThismodularapproachtoimplementingaUSBinterfaceallowsthedesignertochoosetheoptimumsystemmicrocontrollerfromtheavailablewidevariety.Thisflexibilitycutsdownthedevelopmenttime,risks,andcostsbyallowingtheuseoftheexistingarchitectureandminimizefirmwareinvestments.ThisresultsinthefastestwaytodevelopthemostcosteffectiveUSBperipheralsolution.ThePDIUSBD12fullyconformstotheUSBspecificationRev.2.0(basicspeed).Itisalsodesignedtobecompliantwithmostdeviceclassspecifications:ImagingClass,MassStorageDevices,CommunicationDevices,PrintingDevices,andHumanInterfaceDevices.Assuch,thePDIUSBD12isideallysuitedformanyperipheralslikePrinter,Scanner,ExternalMassStorage(ZipDrive),DigitalStillCamera,etc.ItoffersanimmediatecostreductionforapplicationsthatcurrentlyuseSCSIimplementations.ThePDIUSBD12lowsuspendpowerconsumptionalongwiththeLazyClockoutputallowsforeasyimplementationofequipmentthatiscomplianttotheACPI(TM),OnNOW(TM),andUSBpowermanagementrequirements.Thelowoperatingpowerallowstheimplementationofbuspoweredperipherals.Inaddition，italsoincorporatesfeatureslikeSoftConnect(TM),GoodLink(TM),programmableclockoutput,lowfrequencycrystaloscillator,andintegrationofterminationresistors.AllofthesefeaturescontributetosignificantcostsavingsinthesystemimplementationandatthesametimeeasetheimplementationofadvancedUSBfunctionalityintotheperipherals.1.DMAtransferDirectMemoryAddress(DMA)allowsanefficienttransferofablockofdatabetweenthehostandlocalsharedmemory.UsingaDMAcontroller,datatransferbetweenthePDIUSBD12’smainendpoint(endpoint2)andlocalsharedmemorycanhappenautonomouslywithoutlocalCPUintervention.PrecedinganyDMAtransfer,thelocalCPUreceivesfromthehostthenecessarysetupinformationandprogramstheDMAcontrolleraccordingly.Typically,theDMAcontrollerissetupfordemandtransfermodeandthebytecountregisterandtheaddresscounterareprogrammedwiththerightvalues.Inthismode,transfersoccuronlywhenthePDIUSBD12requeststhemandareterminatedwhenthebytecountregisterreacheszero.AftertheDMAcontrollerhasbeenprogrammed,theDMAenablebitofthePDIUSBD12issetbythelocalCPUtoinitiatethetransfer.ThePDIUSBD12canbeprogrammedforsingle-cycleDMAorburstmodeDMA.Insingle-cycleDMA,theDMREQpinisdeactivatedforeverysingleacknowledgementbytheDMACK_Nbeforebeingre-asserted.InburstmodeDMA,theDMREQpiniskeptactiveforthenumberofburstsprogrammedinthedevicebeforegoinginactive.ThisprocesscontinuesuntilthePDIUSBD12receivesaDMAterminationnoticethroughpinEOT_N.ThiswillgenerateaninterrupttonotifythelocalCPUthatDMAoperationiscompleted.ForDMAreadoperation,theDMREQpinwillonlybeactivatedwheneverthebufferisfull,signallingthatthehosthassuccessfullytransferredapackettothePDIUSBD12.Withthedoublebufferingscheme,thehostcanstartfillingupthesecondbufferwhilethefirstbufferisbeingreadout.Thisparallelprocessingincreasestheeffectivethroughput.Whenthehostdoesnotfillupthebuffercompletely(lessthan64bytesor128bytesforsingledirectionISOconfiguration),theDMREQpinwillbedeactivatedatthelastbyteofthebufferregardlessofthecurrentDMAburstcount.Itwillbere-assertedonthenextpacketwitharefreshedDMAburstcount.Similarly,forDMAwriteoperations,theDMREQpinremainsactivewheneverthebufferisnotfull.Whenthebufferisfilledup,thepacketissentovertothehostonthenextINtokenandDMREQwillbereactivatedifthetransferwassuccessful.Also,thedoublebufferingschemeherewillimprovethroughput.Fornon-isochronoustransfer(bulkandinterrupt),thebufferneedstobecompletelyfilledupbytheDMAwriteoperationbeforethedataissenttothehost.TheonlyexceptionisattheendofDMAtransfer,whenthereceptionofpinEOT_NwillstopDMAwriteoperationandthebuffercontentwillbesenttothehostonthenextINtoken.Forisochronoustransfers,thelocalCPUandDMAcontrollerhavetoguaranteethattheyareabletosinkorsourcethemaximumpacketsizeinoneUSBframe(1ms).TheassertionofpinDMACK_Nautomaticallyselectsthemainendpoint(endpoint2),regardlessofthecurrentselectedendpoint.TheDMAoperationofthePDIUSBD12canbeinterleavedwithnormalI/Oaccesstootherendpoints.DMAoperationcanbeterminatedbyresettingtheDMAenableregisterbitortheassertionofEOT_NtogetherwithDMACK_NandeitherRD_NorWR_N.ThePDIUSBD12supportsDMAtransferinsingleaddressmodeanditcanalsoworkindualaddressmodeoftheDMAcontroller.Inthesingleaddressmode,DMAtransferisdoneviatheDREQ,DMACK_N,EOT_N,WR_NandRD_Ncontrollines.Inthedualaddressmode,pinsDMREQ,DMACK_NandEOT_Narenotused;insteadCS_N,WR_NandRD_Ncontrolsignalsareused.TheI/OmodeTransferProtocolofPDIUSBD12needstobefollowed.ThesourceoftheDMACisaccessedduringthereadcycleandthedestinationduringthewritecycle.Transferneedstobedoneintwoseparatebuscycles,storingthedatatemporarilyintheDMAC.2.CommandprocedureTherearethreebasictypesofcommands:Initialization,DataFlowandGeneralCommands.Respectively,theseareusedtoinitializethefunction;fordataflowbetweenthefunctionandthehost;andsomegeneralcommands.2.1InitializationcommandsInitializationcommandsareusedduringtheenumerationprocessoftheUSBnetwork.Thesecommandsareusedtoenablethefunctionendpoints.TheyarealsousedtosettheUSBassignedaddress.1）SetAddress/EnableCode(Hex):D0Transaction:write1byteThiscommandisusedtosettheUSBassignedaddressandenablethefunction.2）SetendpointenableCode(Hex):D8Transaction:write1byteThegeneric/IsochronousendpointscanonlybeenabledwhenthefunctionisenabledviatheSetAddress/Enablecommand.3）SetmodeCode(Hex):F3Transaction:write2bytesTheSetmodecommandisfollowedbytwodatawrites.Thefirstbytecontainstheconfigurationbits.Thesecondbyteistheclockdivisionfactorbyte.4）CLOCKDIVISIONThevalueindicatestheclockdivisionfactorforCLKOUT.TheFACTORoutputfrequencyis48MHz/(N+1)whereNistheClockDivisionFactor.Theresetvalueis11.Thiswillproducetheoutputfrequencyof4MHzwhichcanthenbeprogrammedupordownbytheuser.Theminimumvalueis1givingtherangeoffrequencyfrom4to24MHz.TheminimumvalueofNis0,givingamaximumfrequencyof48MHz.ThemaximumvalueofNis11givingaminimumfrequencyof4MHz.ThePDIUSBD12designensuresnoglitchingduringfrequencychange.Theprogrammedvaluewillnotbechangedbyabusreset.5）SetDMACode(Hex):FBTransaction:read/write1byteThesetDMAcommandisfollowedbyonedatawrite/readto/fromtheDMAconfigurationregister.DMAConfigurationregister:DuringDMAoperation,thetwo-bytebufferheader(statusandbytelengthinformation)isnottransferredto/fromthelocalCPU.ThisallowsDMAdatatobecontinuousandnotinterleavedbychunksofthisheaders.ForDMAreadoperations,theheaderwillbeskippedbythePDIUSBD12.ForDMAwriteoperations,theheaderwillbeautomaticallyaddedbythePDIUSBD12.ThisprovidesforacleanandsimpleDMAdatatransfer.2.2DataflowcommandsDataflowcommandsareusedtomanagethedatatransmissionbetweentheUSBendpointsandtheexternalmicrocontroller.Muchofthedataflowisinitiatedviaaninterrupttothemicrocontroller.ThemicrocontrollerutilizesthesecommandstoaccessanddeterminewhethertheendpointFIFOshavevaliddata.1）ReadinterruptregisterCode(Hex):F4Transaction:read2bytesThiscommandindicatestheoriginofaninterrupt.Theendpointinterruptbits(bits0to5)areclearedbyreadingtheendpointlasttransactionstatusregisterthroughReadLastTransactionStatuscommand.Theotherbitsareclearedafterreadingtheinterruptregisters.2）SelectEndpointCode(Hex):00to05Transaction:read1byte(optional)TheSelectEndpointcommandinitializesaninternalpointertothestartoftheselectedbuffer.Optionally,thiscommandcanbefollowedbyadataread,whichreturnsthisbyte.FULL/EMPTY:A‘1’indicatesthebufferisfull,‘0’indicatesanemptybuffer.STALL:A‘1’indicatestheselectedendpointisinthestallstate.Fig11.SelectEndpointcommand:bitallocation.3）ReadEndpointstatusCode(Hex):80to85Transaction:read1byte4）ReadlasttransactionstatusregisterCode(Hex):40to45Transaction:read1byteTheReadLastTransactionStatuscommandisfollowedbyonedatareadthatreturnsthestatusofthelasttransactionoftheendpoint.Thiscommandalsoresetsthecorrespondinginterruptflagintheinterruptregister,andclearsthestatus,indicatingthatitwasread.Thiscommandisusefulfordebuggingpurposes.Sinceitkeepstrackofeverytransaction,thestatusinformationisoverwrittenforeachnewtransaction.5）ReadbufferCode(Hex):F0Transaction:readmultiplebytes(max.130)TheReadBuffercommandisfollowedbyanumberofdatareads,whichreturnsthecontentsoftheselectedendpointdatabuffer.Aftereachread,theinternalbufferpointerisincrementedby1.ThebufferpointerisnotresettothetopofthebufferbytheReadBuffercommand.Thismeansthatreadingorwritingabuffercanbeinterruptedbyanyothercommand(exceptforSelectEndpoint).Thedatainthebufferareorganizedasfollows:*byte0:reserved;canhaveanyvalue*byte1:number/lengthofdatabytes*byte2:databyte1*byte3:databyte2*etc.ThefirsttwobyteswillbeskippedintheDMAreadoperation.Thus,thefirstreadwillgetDatabyte1,thesecondreadwillgetDatabyte2,etc.ThePDIUSBD12candeterminethelastbyteofthispacketthroughtheEOPterminationoftheUSBpacket.6）WritebufferCode(Hex):F0Transaction:writemultiplebytes(max.130)TheWriteBuffercommandisfollowedbyanumberofdatawrites,whichloadtheendpointsbuffer.ThedatamustbeorganizedinthesamewayasdescribedintheReadBuffercommand.Thefirstbyte(reserved)shouldalwaysbe‘0’.DuringDMAwritesoperation,thefirsttwobyteswillbebypassed.Thus,thefirstwritewillwriteintoDatabyte1,thesecondwritewillwriteintoDatabyte2,etc.Fornon-isochronoustransfer(bulkorinterrupt),thebuffershouldbecompletelyfilledbeforethedataissenttothehostandaswitchtothenextbufferoccurs.TheexceptionisattheendofDMAtransferindicatedbyactivationofEOT_N,whenthecurrentbuffercontent(completelyfullornot)willbesenttothehost.Remark:Thereisnoprotectionagainstwritingorreadingoverabuffer’sboundaryoragainstwritingintoanOUTbufferorreadingfromanINbuffer.Anyoftheseactionscouldcauseanincorrectoperation.DatainanOUTbufferareonlymeaningfulafterasuccessfultransaction.TheexceptionisduringDMAoperationonthemainendpoint(endpoint2),inwhichcasethepointerisautomaticallypointedtothesecondbufferafterreachingtheboundary(doublebufferingscheme).7）ClearbufferCode(Hex):F2Transaction:noneWhenapacketisreceivedcompletely,aninternalendpointbufferfullflagisset.AllSubsequentpacketswillberefusedbyreturningaNAK.Whenthemicrocontrollerhasreadthedata,itshouldfreethebufferbytheClearBuffercommand.Whenthebufferiscleared,newpacketswillbeaccepted.8）ValidatebufferCode(Hex):FATransaction:noneWhenthemicroprocessorhaswrittendataintoanINbuffer,itshouldsetthebufferfullflagbytheValidateBuffercommand.ThisindicatesthatthedatainthebufferarevalidandcanbesenttothehostwhenthenextINtokenisreceived.9）SetendpointstatusCode(Hex):40to45Transaction:write1byteAstalledcontrolendpointisautomaticallyunstalledwhenitreceivesaSETUPtoken,regardlessofthecontentofthepacket.Iftheendpointshouldstayinitsstalledstate,themicrocontrollercanre-stallit.Whenastalledendpointisunstalled(eitherbytheSetEndpointStatuscommandorbyreceivingaSETUPtoken),itisalsore-initialized.ThisflushesthebufferandifitisanOUTbufferitwaitsforaDATA0PID,ifitisanINbufferitwritesaDATA0PID.Evenwhenunstalled,writingSetEndpointStatusto‘0’initializestheendpoint.2.3GeneralcommandsSendresumeCode(Hex)：F6Transaction：noneSendsanupstreamresumesignalfor10ms.Thiscommandisnormallyissuedwhenthedeviceisinsuspend.TheRESUMEcommandisnotfollowedbyadatareadorwrite.ReadcurrentframenumberCode(Hex)：F5Transaction：read1or2bytesThiscommandisfollowedbyoneortwodatareadsandreturnstheframenumberofthelastsuccessfullyreceivedSOF.TheframenumberisreturnedLeastSignificantbytefirst.附錄四：英文譯文PDIUSBD12帶并行總線的USB接口器件PDIUSBD12是一款性價比很高的USB器件，它通常用作微控制器系統(tǒng)中實(shí)現(xiàn)與微控制器進(jìn)行通信的高速通用并行接口，它還支持本地的DMA傳輸。這種實(shí)現(xiàn)USB接口的標(biāo)準(zhǔn)組件使得設(shè)計者可以在各種不同類型微控制器中選擇出最合適的微控制器。這種靈活性減小了開發(fā)的時間，風(fēng)險以及費(fèi)用（通過使用已有的結(jié)構(gòu)和減少固件上的投資），從而用最快捷的方法實(shí)現(xiàn)最經(jīng)濟(jì)的USB外設(shè)的解決方案。PDIUSBD12完全符合USB1.1版的規(guī)范，它還符合大多數(shù)器件的分類規(guī)格，成像類海量存儲器件，通信器件，打印設(shè)備以及人機(jī)接口設(shè)備。同樣地，PDIUSBD12理想地適用于許多外設(shè)。例如，打印機(jī)，掃描儀，外部的存儲設(shè)備（Zip驅(qū)動器）和數(shù)碼相機(jī)等等。它使得當(dāng)前使用SCSI的系統(tǒng)可以立即降低成本。PDIUSBD12所具有的低掛起功耗連同LazyClock輸出可以滿足使用ACPI，OnNOW和USB電源管理的要求，低的操作功耗可以應(yīng)用于使用總線供電的外設(shè)。此外它還集成了許多特性，包括SoftConnetTM，GoodLinkTM，可編程時鐘輸出，低頻晶振和終止寄存器集合。所有這些特性都為系統(tǒng)顯著節(jié)約了成本，同時使USB功能在外設(shè)上的應(yīng)用變得容易。1.DMA傳輸直接存儲器尋址（DMA）允許在主端點(diǎn)和本地共享存儲器間實(shí)現(xiàn)數(shù)據(jù)塊的有效傳輸。使用DMA控制器，PDIUSBD12的主端點(diǎn)和本地共享存儲器間的數(shù)據(jù)傳輸可自主進(jìn)行而不需要本地CPU的干預(yù)。要處理任何DMA傳輸，本地CPU從主機(jī)接收必要的SETUP信息并對DMA控制器進(jìn)行相應(yīng)的編程，典型的對DMA控制器的傳輸模式，字節(jié)計數(shù)寄存器和地址計數(shù)器進(jìn)行正確的編程。在該模式下，PDIUSBD12發(fā)出請求時開始傳輸。當(dāng)字節(jié)計數(shù)器減少為零時終止。在DMA控制器編程之后，本地CPU在初始化傳輸時將PDIUSBD12中的DMA使能位置位。PDIUSBD12可編程為單周期DMA或突發(fā)模式DMA。在單周期DMA中，DMREQ在每單個應(yīng)答后直到被DMACK_N重新激活之前保持無效。在突發(fā)模式DMA中，DMREQ在器件中突發(fā)編程時一直保持有效。該過程持續(xù)到PDIUSBD12通過EOT_N接收到一個DMA終止信息。這時產(chǎn)生一個中斷指示本地CPUDMA操作已經(jīng)完成。在DMA讀操作時DMREQ僅當(dāng)緩沖區(qū)完全表示主機(jī)成功的發(fā)送了一個信息包到PDIUSBD12時才有效。由于具有雙緩沖配置，主機(jī)可以在第一個緩沖區(qū)被讀出時對第二個緩沖區(qū)進(jìn)行填充，這種并行的處理有效的增加了數(shù)據(jù)吞吐量。當(dāng)主機(jī)沒有完全填滿緩沖區(qū)的情況下（單向ISO配置時小于64或128字節(jié)），DMREQ會在緩沖區(qū)的最后一個字節(jié)時無效而不管當(dāng)前的DMA突發(fā)計數(shù)。在更新了DMA突發(fā)計數(shù)的下一個包發(fā)送時，DMREQ再次被激活。DMA的寫操作與之相似，當(dāng)緩沖區(qū)未裝滿時，DMREQ一直有效。當(dāng)緩沖區(qū)填滿時，在下一個IN標(biāo)志將信息包送入主機(jī)。當(dāng)傳輸完成之后，DMREQ變?yōu)闊o效。同樣的，雙緩沖配置在這也改善了數(shù)據(jù)的吞吐量。在非同步傳輸中，批量模式和中斷。在數(shù)據(jù)被發(fā)送到主機(jī)之前，緩沖區(qū)需要通過DMA寫操作完全裝滿。唯一的例外是，在DMA傳輸結(jié)束時，EOT_N接收的信號將會停止DMA寫操作并且在下一個IN標(biāo)志置位時將緩沖區(qū)的內(nèi)容傳送到主機(jī)。在同步模式中，本地CPU和DMA控制器必須保證它們在一個USB幀（1ms）中能夠吞吐的最大信息包的規(guī)模。DMACK_N的激活將自動選擇主端點(diǎn)（端點(diǎn)2）而不管當(dāng)前選擇的端點(diǎn)。PDIUSBD12的DMA操作可通過普通的I/O對其它端點(diǎn)的存取實(shí)現(xiàn)交叉存取。DMA操作可通過以下方式終止：復(fù)位DMA使能寄存器位或EOT_N加上DMACK_N以及RD_N/WR_N的激活。PDIUSBD12支持單地址模式中的DMA傳輸，也可以在DMA控制器的雙地址模式中工作。在單地址模式中DMA通過DREQDMACK_N,EOT_N,WR_N和RD_N控制線實(shí)現(xiàn)傳輸。在雙地址模式中DMREQ,DMACK_N和EOT_N未用，取而代之的是CS_N,WR_N和RD_N控制信號。需要遵循PDIUSBD12的I/O模式傳輸協(xié)議。在讀周期中對DMAC信號源進(jìn)行訪問，在寫周期對目標(biāo)進(jìn)行訪問，傳輸需要兩個單獨(dú)的總線周期來儲存暫存在DMAC中的數(shù)據(jù)。2.命令描述有3種基本的類型的命令：初始化，數(shù)據(jù)流和通用命令。2.1初始化命令初始化命令在USB網(wǎng)絡(luò)進(jìn)行枚舉處理時使用，這些命令用于使能端點(diǎn)的功能，還可用來設(shè)置USB配的地址。1）設(shè)置地址/使能命令：D0h處理：寫1字節(jié)該命令用于設(shè)置USB分配的地址和使能功能。地址寫入的值即為地址使能置1使能該功能2）設(shè)置端點(diǎn)使能命令：D8h處理：寫1字節(jié)通過設(shè)置設(shè)置地址/使能命令后才可使能普通/同步端點(diǎn)普通/同步端點(diǎn)值1表示普通/同步端點(diǎn)使能3）設(shè)置模式命令：F3h處理：寫2字節(jié)設(shè)置模式命令后跟2個寫入的數(shù)據(jù)，第一個字節(jié)包含配置字節(jié)信息，第二個字節(jié)是時鐘分頻因素字節(jié)。配置字節(jié)無LazyClock：1表示CLKOUT不會切換到LazyClock，0表示CLKOUT在Suspend腳變高之后切換到LazyClock，LazyClock頻率是30KHz±40%，編程值將不過會被總線復(fù)位所改變。時鐘運(yùn)行：1表示內(nèi)部時鐘和PLL即使在掛起狀態(tài)下仍然運(yùn)行，0表示只要不需要時，內(nèi)部時鐘晶振和PLL就停止運(yùn)行，為了滿足嚴(yán)格的掛起電流要求，該位需要設(shè)置為0，已編程的值不會被總線復(fù)位所改變。中斷模式：1表示報告所有的錯誤和“NAKing”并產(chǎn)生一個中斷。0表示只有OK被報告。編程值不會被總線復(fù)位所改變。SoftConnect：1表示如果VBUS可用，上行數(shù)據(jù)上拉電阻就被連接，0表示不連接。已編程的值不會被總線復(fù)位所改變。端點(diǎn)配置：該2位設(shè)置端點(diǎn)配置如下： 模式0非同步模式模式1同步輸出模式模式2同步輸入模式模式3同步輸入/輸出模式4）時鐘分頻系數(shù)字節(jié)時鐘分頻系數(shù)：該