同步時序線路分析和設計-1

AnalysisandSynthesisofSynchronousSequentialCircuitsClassificationofSequentialCircuitsSynchronousSequentialCircuits(同步時序電路):Allflip-flopsinsystemarecontrolledbyaglobalclocksignal.Thatiswhatwediscussedinthischapter.AsynchronousSequentialCircuits(異步時序電路):Allflip-flopsarenotdrivenbyoneclocksignalorthereisnoclockpulseinput.Thatis,thetransitionfromonestatetoanotherisinitiatedbythechangeintheprimaryinputs;thereisnoexternalsynchronisation(無外部同步機制).TwoBasicModelsMealy(米里型):Theoutputisafunctionofpresentstate&presentinputs;Moore(摩爾型):Theoutputcanchangeonlywhenthestatechangesandhavenothingtodowiththeinputs.Outputonlydependsonpresentstates.TwoTypicalApplicationsAnalysis(分析):Withgivencircuit,tellwhatdoesitdo?Design/Synthesis(設計/綜合):Givenspecificationofcircuit,developdesigns.SomeImportantConceptsDrivenEquation(ControlEquation,ExcitingEquation)(驅(qū)動方程)TheinputofFFs,suchas:J=….;K=….;CharacteristicEquation(特征方程)BelongstooneFF,suchasQn+1=D;StateEquation(狀態(tài)方程)Equationdescribingtherelationshipofpresentstate(現(xiàn)態(tài))&nextstate(次態(tài))SomeImportantConceptsStatetransitiontable(狀態(tài)轉(zhuǎn)移表)Statetransitiondiagram(狀態(tài)轉(zhuǎn)移圖)XPresentStateNextStateYQ1(n)Q0(n)Q1(n+1)Q0(n+1)0000110110110111110011001100100010011111010/1000110110/10/10/11/01/11/11/0AnalysisofSynchronousSequentialCircuitsGivenCircuitsDerivetheOutputEquation&DrivenEquationsGivetheState

Transition

Table/

diagramBuildtheStateTransitionEquationTiming

diagramExplainTheLogicFuncitonExample1(analysis)Step1,GivetheOutputEquation&DrivenEquationsExample1(analysis)Step2,DerivetheStateTransitionEquationExample1(analysis)Step3,Buildthestatetable/diagram

Example1(analysis)Step3,Buildthestatetable/diagram

010/10010110/10/10/01/11/01/11/1Example1(analysis)Step4,Tellthelogicfunction由狀態(tài)圖可知，本例給定的時序線路也是一個可逆二進制計數(shù)器。所示電路是一個摩爾型的同步時序線路，因為該線路的狀態(tài)也是由同一個CP脈沖改變的，但路線的輸出僅取決于現(xiàn)態(tài)，而與輸入無直接關系。010/10010110/10/10/01/11/01/11/1課堂練習Letusexplorethebehaviorofthecircuitinthisfigurebydevelopingatimingdiagram,statetable,andstatediagram.Thetimingdiagramshouldshowthecircuitresponsetotheinputsequencex=01101000,withthecircuitbeginninginstatey=0.Exercise(analysis)Exercise(analysis)

yx0101/00/011/00/1Yn+1/zStatetableStatediagram0=A1=BExercise(analysis)X=01101000Y=01001011Yn+1=10010111Z=01001000Exercise(analysis)01X=01101000Y=01001011Z=01001000Exercise(analysis)Y的狀態(tài)變化必然發(fā)生在下降沿z則不必Step1:DerivethestatediagramStep2:Simplify(化簡)thestateStep3:Encode(編碼)thestateStep4:DerivetheExcitingK-map(激勵卡諾圖)Step5:CheckSelf-startupStep6:DrawthecircuitSteps：DesignofSequentialCircuitAcquiretheOriginalStateDiagram(原始狀態(tài)圖)Example1(originalstatediagram)Designan“101”serialdetector(序列檢測器),givetheoriginalstatediagram(when“101”appears,theoutputZis1,otherwiseZ=0)S0:No“1”;S1:Get“1”;S2:Get“10”;S3:Get“101”;Input: 11010010101101Output: 00010000101001Example1Example2(originalstatediagram)Designan“01”serialdetector(序列檢測器),givetheoriginalstatediagram(when“01”appears,theoutputZis1,otherwiseZ=0)S0:No“0”;S1:Get“0”;S2:Get“01”;Input: 11010010101101Output: 00010010101001S0S10/00/01/11/0S20/01/0Example2(originalstatediagram)Designan“01”serialdetector(序列檢測器),givetheoriginalstatediagram(when“01”appears,theoutputZis1,otherwiseZ=0)S0:No“0”;S1:Get“0”;Input: 11010010101101Output: 000100101010010/0S0S10/01/11/0SimplifytheStateTableSimplifytheStateTableGenerallyspeaking,theOriginalStateTablemaynotbethemostreducedone.(someequivalentstatesmayexist)ByReducingthestatetable,wecanassignlessFlip-Flops.PrincipleofSimplificationWecanconsiders1=s2ifinanycase,theoutputofS1&S2bethesameandthenextstatebethesame(次態(tài)相等).Considers1=s2ifinanycase,theoutputofS1&S2bethesameandthenextstatebeinterleaving(次態(tài)交錯)Considers1=s2ifinanycase,theoutputofS1&S2bethesameandthenextstateloop(次態(tài)循環(huán))ThisisSameStateY\X01AB,0A,0BB,0C,1CB,0A,0ThisisStateLoopY\X01AA,1B,1BB,0C,1CC,1B,1ThisisStateInterleavingY\X01AB,1C,0BB,0C,1CB,1A,0NotEquivalentifoutputnottheSameY\X01AA,1B,1BB,0C,1CA,0B,1JustLookintothetableY\X01AE,0D,0BA,1F,0CC,0A,1DB,0A,0ED,1C,0FC,0D,1JustLookintothetableY\X01AE,0D,0BA,1F,0CC,0A,1DB,0A,0ED,1C,0FC,0D,1隱含表法化簡原始狀態(tài)表隱含表：直角三角形網(wǎng)格。網(wǎng)格數(shù)為總狀態(tài)數(shù)減1；橫向從左到右依次標注1~n-1個狀態(tài)名，縱向從上到下依次標注2~n個狀態(tài)名。隱含表法化簡原始狀態(tài)表比較結(jié)果有狀態(tài)對等效、不等效、不能確定三種。等效時在相應方格填“∨”；不等效時在相應方格填“╳”，不能確定時，將次態(tài)對填入相應方格關聯(lián)比較，確定等效狀態(tài)對確定最大等效類，作最小化狀態(tài)表EncodeStates(狀態(tài)編碼)EncodeStatesAssigneverystateintheReducedStateTablewithabinarycodeAssumethatthenumberofstateisN,andthenumberofFlip-FlopisK,theremustbe2K≥N.N=9,K=4N=7,K=3Withdifferentencodingmethod,theremustbedifferentcircuitrealization.PrincipleofEncoding從理論上講，有可能找到一種確定最佳狀態(tài)編碼的算法，然而至今尚未獲得滿意而又實用的結(jié)果。對于狀態(tài)表中同一輸入下的相同次態(tài)所對應的現(xiàn)態(tài)，應給予相鄰編碼。所謂相鄰編碼，就是指各二進制代碼中只有一位碼不同。為方便起見，我們把這條規(guī)則簡稱為“次態(tài)相同，現(xiàn)態(tài)相鄰”對于狀態(tài)表中同一現(xiàn)態(tài)在不同輸入下的次態(tài)，應給予相鄰編碼。該規(guī)則可簡稱為“同一現(xiàn)態(tài)，次態(tài)相鄰”對狀態(tài)表中輸出完全相同的現(xiàn)態(tài)應給予相鄰編碼。該規(guī)則可簡稱為“輸出相同，現(xiàn)態(tài)相鄰”狀態(tài)表中出現(xiàn)次數(shù)最多的狀態(tài)應該分配為邏輯0EncodeStates例略。見后面設計的詳細例子ExcitingK-Map(激勵卡諾圖)ExcitingK-MapStateassignmentStateTransitiontableUsingfalling-edgetriggeredDFFCombinationalcircuitxzQ/Q/QQDDCCCP??????Targ