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1、重 慶 理 工 大 學(xué)文 獻(xiàn) 翻 譯二級學(xué)院 應(yīng)用技術(shù)學(xué)院 班 級 109217402 譯 文 要 求1、譯文內(nèi)容必須與課題(或?qū)I(yè))內(nèi)容相關(guān),并需注明詳細(xì)出處。2、外文翻譯譯文不少于2000字;外文參考資料閱讀量至少3篇(相當(dāng)于10萬外文字符以上)。3、譯文原文(或復(fù)印件)應(yīng)附在譯文后備查。 譯 文 評 閱導(dǎo)師評語(應(yīng)根據(jù)學(xué)?!白g文要求”,對學(xué)生外文翻譯的準(zhǔn)確性、翻譯數(shù)量以及譯文的文字表述情況等作具體的評價) 指導(dǎo)教師: 年 月 日三相電壓型pwm整流器建模和仿真研究摘要:三相電壓型pwm整流器(vsr)廣泛用于ac/dc/ac系統(tǒng)前端整流??紤]到vsr本身非線性特點,建立適合于控制器設(shè)計上

2、的數(shù)學(xué)模型比較,提出了一種狀態(tài)反饋解耦控制電流內(nèi)環(huán)和直流電壓平方外環(huán)的電壓型pwm整流器新型控制策略,基于功率平衡理論,采用解耦狀態(tài)反饋控制方法,分析并建立了三相電壓型pwm 整流器 dq 坐標(biāo)系下的線性化數(shù)學(xué)模型。由于采用直流電壓平方外環(huán),使典型的非線性模型線性化,控制器設(shè)計直觀精確,提高了直流電壓和網(wǎng)側(cè)電流的跟蹤能力,改善了波形。提出了一種空間矢量的簡化算法,簡化了運算過程。在matlab/simulink 環(huán)境中建立了仿真模型。仿真結(jié)果表明:所設(shè)計整流器具有優(yōu)良的穩(wěn)態(tài)性能和快速的動態(tài)響應(yīng),實現(xiàn)簡單,具有一定的實用價值。 關(guān)鍵詞:電壓型pwm整流器;功率平衡;解耦狀態(tài)反饋;空間矢量脈寬調(diào)制

3、;仿真引言 在當(dāng)今的電力系統(tǒng)當(dāng)中大都采用二極管和相控轉(zhuǎn)換器。這種轉(zhuǎn)換器電路簡單,但缺點是線電流畸變嚴(yán)重和功率因數(shù)較低。為了解決這個問題,pwm 整流器的基于線電流波形整定的的各種功率因數(shù)校正技術(shù)被提出來了。 pwm 整流器有以下幾個優(yōu)勢比如:直流總線電壓的控制功率雙向流動單位功率因數(shù)、線電流正弦化。 為了提高輸入功率因數(shù)和整定輸入電流正弦化,整流裝置采用了許多控制技術(shù),傳統(tǒng)的整流模型是多輸入多輸出非線性系統(tǒng)。整流器控制中最困難的就是非線性。 在優(yōu)秀的研究報告中,直接電流控制傳統(tǒng)的控制策略是建立功率因數(shù)補(bǔ)償?shù)膬?nèi)環(huán)和電壓調(diào)節(jié)的外環(huán)的雙環(huán)控制。大多數(shù)的系統(tǒng)參數(shù)依賴于pi調(diào)節(jié)器:輸出電壓控制環(huán)會產(chǎn)生電

4、流內(nèi)環(huán)的參考電流的參考指數(shù)或振幅。 電流內(nèi)環(huán)的作用是是三相交流負(fù)載的電流跟隨給定信號的變化。 本文著重探討了vsr的建模和控制。以一種新的基于電力電量平衡方程來取代原有的非線性方程。然后應(yīng)用非線性輸入變換使改進(jìn)后的模型線性的。提出了一種簡化算法空間矢量pwm整流器。該算法避免了傳統(tǒng)方法的查表的正弦或反三角和復(fù)雜計算的需要是直接計算空間電壓矢量的責(zé)任周期跟蹤參考電壓矢量在每一個環(huán)節(jié)上的空間矢量。1、 vsr的建模和控制1.1vsr在dq坐標(biāo)系下的數(shù)學(xué)模型三相電壓型電路的主電路如圖 1 所示,每個半導(dǎo)體開關(guān)由一個 igbt 和并行的二極管組成。這里 ua,ub,uc分別為三相平衡電壓源的相電壓,i

5、a,ib,ic為相電流,vdc是直流輸出電壓,r和l分別代表濾波電抗器的電阻和電感,c是平滑電容,rl是直流側(cè)負(fù)載,il 是負(fù)載電流。 以下公式描述了整流器在 dq 坐標(biāo)下的動態(tài)特性:在這里urd=sdvdc, urq=sqvdc,urd,urq,和sd,sq分別是整流器輸入電壓,在同步旋轉(zhuǎn)dq坐標(biāo)系的開關(guān)函數(shù)。ud,uq和id,iq分別為同步旋轉(zhuǎn)dq坐標(biāo)下的電壓源和電流,為角頻率。 圖 1,三相電壓型整流器主電路1.2 電流環(huán)狀態(tài)反饋解耦方法在上述的非線性方程中,公式(1)(2)說明sd,sq與狀態(tài)變量vdc有關(guān),urd=sdvdc和urq=sqvdc,說明urd和sd ,urq和sq沒有動

6、態(tài)關(guān)系,因此一個非線性輸入變換可以用于修改將舊的輸入變量 sd,sq變成urd ,urq,而且模型說明dq電流和耦合電壓wliq和wlid有關(guān)系,而且受主電壓ud,uq以及urd和urq的影響。公式(1)和(2)中的urd和urq表示為公式(4)(5)。 將公式(4)(5)帶入公式(1)(2),被控變量和新輸入的最關(guān)系是線性和解耦的非線性表達(dá),vsr 的預(yù)期關(guān)系是:從等式中我們可以看到,兩個軸的電流是完全解耦的,與只和期望的id與iq是有關(guān)系的,電壓環(huán)和電流環(huán)采用簡單的pi控制方法。1.3 外環(huán)電壓設(shè)計公式(3)描述了vdc的模型,功率平衡方程可以用來輔助替代方程模型。吸收的有功功率交流電流功

7、率(pac)和有功功率轉(zhuǎn)換器直流功率(pdc)表達(dá):pac和pdc的關(guān)系是:pac=pdc+ploss (10)ploss包括電阻r功率損耗以及開關(guān)和vsr傳導(dǎo)損失,電阻r通常很小,它實際上是合理的忽視它的能量損失,整流器損失是比電阻r損失功率大,但它們?nèi)匀皇强偣β屎苄〉囊徊糠?,因此,忽略整流器損失沒有明顯的損失整流器準(zhǔn)確性。如果更精確的表示損失,需要整流器可以表示一個小電阻rl,直流側(cè)總電阻用rl表示,從pac=pdc中可以看出,下面是動態(tài)結(jié)果:重新整流公式得:由vdc的單相特性,以為變量,公式(12)就會變成線性的,將公式(8)帶入公式(12)得到這是的動態(tài)方程和輸出的狀態(tài)變量,是輸入,設(shè)

8、計一個簡單的pi控制器能夠調(diào)節(jié)直流電壓無穩(wěn)態(tài)誤差,ud是可測量的,實際的輸出變量id從中得到,電流內(nèi)環(huán)的結(jié)果為id的參考值。圖2顯示內(nèi)部電流回路與狀態(tài)反饋解耦和vsr外環(huán)控制系統(tǒng)。圖2,三相vsr的雙閉環(huán)控制模塊2.空間電壓矢量合成當(dāng)?shù)玫絬rd和urq后,通過dq變換到變換得到精確的直流電壓命令和直流總線電壓。根據(jù)圖1開關(guān)狀態(tài)的橋式整流電路,橋式整流器電壓可以假設(shè)8個狀態(tài)電壓矢量(v0到v7)。v1到v7是六個確定的非零矢量,v0和v7是圖3中所示的兩個零矢量。三相輸入電壓分為六個60,如圖4所示:定義 圖3 pwm橋式整流器-變換空間矢量表示圖4 三相輸入電壓六個分區(qū)n=sign(b0)+2

9、sign(b1)=4sign(b2) (16)在圖5所示,信號分為6個60間隔,相對于另一個信號的跡象,它滿足了那個標(biāo)志兩個信號幅值都是一樣的。在每個分區(qū),并沒有明顯變化。設(shè)置的值,每個都是獨一無二的。例如,再間隔1,b0是正的,b1,b2是負(fù)的。圖5,b0,b1,b2六個分區(qū)其中的矢量是基于表達(dá)式(6)的,如圖4表示,矢量與n的一致關(guān)系如表1所示。表一三相電壓可視為一個電壓矢量對。有許多不同的方法合成,根據(jù)調(diào)制的不同組合八個向量。這些方法,可以使兩相調(diào)制的開關(guān)損耗減少,在一個工作循環(huán)內(nèi)其中一個開關(guān)應(yīng)該總是開或關(guān)。理想的參考矢量是在每一個子環(huán)平均取樣時間ts和實現(xiàn)了三個最近的空間向量的平均向量

10、。例如,在圖3中所示的參考矢量,電壓vs和角度和電流i用矢量1,矢量2和零矢量表示。三個持續(xù)的空間向量t1、t2、tz分別計算為:其他矢量合成與矢量合成方法是相似的,通用的變量x,y,z的通用矢量表達(dá)如下:對于任何參考向量,持續(xù)兩個時間空間向量,如列表2。3、仿真基于前面的分析,利用圖1的三相vsr的matlab/simulink仿真,利用igbt的實驗負(fù)載和以下參數(shù):urms220v,l 3mh,r0.1,c 4700mf,rl16,vdc=700v.下面的兩個數(shù)據(jù)總結(jié)simulation的仿真結(jié)果。圖6的結(jié)果顯示了瞬態(tài)響應(yīng)輸出電壓,第二個數(shù)字顯示輸入電流的瞬態(tài)響應(yīng)。在回路負(fù)載rl=16時仿

11、真開始時刻直流母線電壓停留在二極管整流器的水平。然后,應(yīng)用控制負(fù)載電阻和輸出電壓增加到預(yù)期直流電壓值。圖7顯示所需的電壓和電流在同一側(cè)。我們能看到電流與電壓同相位。圖6,直流電壓動態(tài)仿真結(jié)果4、總結(jié)本文中,給出了一個非線性變換方法推導(dǎo)三相vsr。一種新的控制策略是應(yīng)用前面介紹的狀態(tài)反饋解耦的電流內(nèi)環(huán)和本文介紹的基于狀態(tài)空間解耦的電壓外環(huán),利用非線性輸入的轉(zhuǎn)變,傳統(tǒng)的非線性模型可以變換為線性模型。這一改善使設(shè)計的控制器變得簡單明了。介紹了svpwm算法描述和驗證。仿真結(jié)果表明它具有更好的控制精度,更少的開關(guān)動作、計算簡便、容易實現(xiàn),更好的利用直流電壓。圖7,a相電壓、電流仿真結(jié)果文獻(xiàn)原文mode

12、ling and simulation research for three-phase voltage source pwm rectifierabstract:pulse-width modulated three-phase voltage source rectifier(vsr)is the building blocks of the most of ac/dc/ac systems as the front-end rectifier. the major difficulty in control is caused by the nonlinearities in the r

13、ectifier model. the linear mathematical model of vsr in d-q coordinates was deduced with analysis based on the power balance equation. a new control strategy using inner current loop with state feedback decoupling and outer voltage square loop was proposed.nonlinear input transformation was used to

14、derive a linear model from the original nonlinear model. the advantages of the proposed scheme include accuracy controller design fast dynamic response and high quality of the current and voltage waveforms.a simplified algorithm was proposed for space vector pwm svpwm rectifier. the whole system was

15、 modeled and simulated by using the toolbox of matlab/simulink. simulation results show that the pwm model proposed can satisfy steady-state characteristics and fast transient response. this design scheme has some value for practical operation due to its simple implement.keywords:vsr;power balance e

16、quation;state feedback decoupling; svpwm;simulation introduction diode and phase-controlled converters constitute the largest segment of power electronics that interface to the electric utility system today. these converter circuits are simple but the disadvantages are large distortion in line curre

17、nt and poor power factor. to combat these problems the pwm rectifier various power factor correction(pfc) techniques based on active wave shaping of the line current have been proposed.the pwm rectifier offers several advantages such as: control of dc bus voltage,bi-directional power flow unity powe

18、r factor and sinusoidal line current. many control techniques have been adopted for these rectification devices to improve the input power factor and shape the input current of the rectifier into sinusoidal waveform. in actual implementations the direct current control scheme is widely adopted. the

19、conventional rectifier model is a multi-input multi-output nonlinear system. the difficulty in controlling the rectifiers is mainly due to the nonlinearity. as reported in the excellent survey traditional control strategies in the direct current control scheme establish two loops: a line current inn

20、er loop for power factor compensation and an output voltage outer loop for voltage regulation. the most uses system parameters dependent proportional integral (pi) regulator: for the output voltage control loop which can generate the modulation index or the amplitude of the reference current for the

21、 inner pwm input current control loops. the main task of the current inner loop is to force the currents in a three-phase ac load to follow the reference signals. this paper focuses on the modeling and control of the vsr.a new equation based on power balance is introduced to replace the original non

22、linear equation. then,nonlinear input transformation is applied to make the improved model linear. a simplified algorithm is proposed for space vector pwm rectifier. this algorithm avoids the look-up tables of sine or arc-tangent and complex calculations needed in the conventional methods by directl

23、y calculating the duty cycles of space voltage vectors which track the reference voltage vectors in each sector in the space vector.1 modeling and control of vsr 1.1 the mathematical model of vsr in d-q coordinates the main circuit diagram of the three-phase voltage source rectifier structure is sho

24、wn in fig.1.each power semiconductor switch consists of an igbt connected in parallel with a diode. where ua ,ub and uc are the phase voltages of three phase balanced voltage source and ia ,ib and ic are phase currents vdc is the dc output voltage r and l mean resistance and inductance of filter rea

25、ctor respectively c is smoothing capacitor across the dc bus rl is the dc side load and il is load current. the following equations describe the dynamical behavior of the boost type rectifier in park coordinated or in d-q:where,urd=sdvdc, urq=sqvdc,urd,urq,and sd,sq are input voltage of rectifier,sw

26、itch function in synchronous rotating d-q coordinate respectively. ud,uq and id,iq are voltage source current in synchronous rotating d-q coordinate respectively. is angular frequency.fig.1 circuit schematic of three-phase two-level boost-type rectifier1.2 decoupled state-feedback control method of

27、current loop in the above nonlinear model equation 1 and equation2 show that both input variables sd and sq are coupled with the state variable vdc. the fact that urd sd vdc and urq=sq vdc, shows that there is no dynamics between urd and sd or urq and sq.therefore a nonlinear input transformation ca

28、n be used to modify the old input variables sd and sq to the new input variables urd and urq. moreover the model shows that d-q current is related with both coupling voltages liq and lid, and main voltages ud and uq besides the influence of urd and urq.urd and urq in the equations(1)and(2)can be reg

29、ulated to ensure the correctness of equations(4)and(5). putting equation (4)and(5)into equation(1)and(2)the nonlinear expression is such that the final relation between the controlled variables and the new inputs is linear and decoupled. thus,the expected relations in the vsr are,we can see from equ

30、ation that the two axis current are totally decoupled. urd and urq, are only related with id and iq respectively.the simple proportional-integral(pi)controllers are adopted in the current and voltage regulation.1.3 design of outer voltage square loopequation (3) describes the dynamics of vdc. power

31、balance equation can be used to derive an alternate equation for vdc dynamics. the active power absorbed from the ac source(pac) and the active power delivered to the converter dc-side (pdc) are expressed by: the relationship between pac and pdc is: pac=pdc+ploss (10) where ploss includes the power

32、loss in the resistor r as well as the switching and conduction losses in the vsr. the resistance r is always very small and thus it is practically reasonable to neglect its power loss. the rectifier losses are larger than the power loss in r but still they count for a small portion of the total powe

33、r. therefore,the rectifier losses can also be neglected without noticeable loss of accuracy. if better accuracy is desired the rectifier losses can be represented by a small resistor in series with rl. the total equivalent dc-side resistance is still represented by rl. from pac=pdc,the following dyn

34、amic results: which can be rearranged in following form: due to uni-directional nature of vdc ,taking vdo2 as the variable,(12) will become linear.putting equation (8) into equation(12),this is a first-order dynamic equation with vdc2 as the state variable as well as the output,and pac as the input.

35、 a simple pi controller can be designed to regulate the dc voltage with no steady state error. since ud is measurable,the actual input variable id can be derived from pac. the result is actually the reference value of id for the current inner control loop. fig.2 displays inner current loop with stat

36、e feedback decoupling and outer voltage square loop control system for vsr.fig.2 block diagram of double close-loop control for three-phase vsr2 voltage space-vector synthesizationwhen the urd and urq acquired the svpwm method is realized through d-q to -transformation to trace the ac current comman

37、d exactly and regulate the dc bus voltage. depending on the switching state on the circuit fig.1 the bridge rectifier leg voltages can assume 8 possible distinct states represented as voltage vectors (v0 to v7). v1 to v6 are six fixed nonzero vectorsv0 and v7 are two zero vectors as shown in the fig

38、.3.the input three phase voltage are divided into six 60input intervals,as shown in fig.4. defining: fig.3- space vector representation of the pwm bridge rectifier leg voltagefig.4 six intervals of input three voltagen=sign(b0)+2sign(b1)=4sign(b2) (16)as shown in fig.5the signals are divided into si

39、x 60 intervals it satisfies that the signs of the amplitudes of two signals are the same and opposite to the sign of another signal. and no sign change occurs during each interval. the value of n in every sector is unique.in interval 1,for example,b0 is positive,b1 and b2 are negative.fig.5 six inte

40、rvals of b0 b1 and b2the sector in which is depends on the expression (6) compared with fig.4,it is obvious that the corresponding relations between value n and sector are seen in table1. table 1 determination of sector of based on nthree-phase voltage can be treated as a voltage vector vs. there ar

41、e many different methods of modulation to synthesize according to the different combinations eight vectors. among these methods,the two-phase modulation can make switching loss minimize,in which one switch should be always set on or off in one working cycle.the desired reference vector is sampled in

42、 every sub-cycle ts and realized by time averaging the three nearest space vectors in the space vector plane. for example the reference vector shown in fig.3with magnitude vs and anglein sectoris realized by applying the active vector 1the active vector 2 and the zero vectors. the durationst1,t2 and

43、 tz of the three space vectors respectively is calculated as:the vector synthetic method of other sector is similar. the expressions which is developed on the universal variable x,y,z are shown as following: for any reference vector the duration time of two space vectors are assigned as table2.3 simulation resultsbased on the former analysis the matlab/simulink simulation model for the vsr of fig.1with the test load was implemented us

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