PCB-設(shè)計規(guī)范rev4(20050117).doc

HON HAI PRECISION IND. CO., LTD.印刷電路板設(shè)計規(guī)範(fàn)Print Circuit Board Layout RuleHON HAI PRECISION IND. CO., LTD.HSINCHU SCIENCE PARK BRANCH OFFICEPROPRIETARY NOTEThis item is the property of Hon Hai Precision Ind. Co, LTD., Taiwan, and contains confidential and trade secret information. This item may not be transferred from the custody of Hon Hai, except as authorized by Hon Hai Precision Ind. Co, LTD. and then only by way of loan for limited purposes. It must not be reproduced in whole or in part and must be returned to Hon Hai Precision Ind. Co, LTD. upon request and in all events upon completion of the purpose of the loan.設(shè)計規(guī)範(fàn)修改履歷表項目日期版本變更說明負(fù)責(zé)人11999/12/200無覃桂芳鄭雅慧黃介彥 22001/12/1111. 重新檢討SMT, Wave Solder與手焊設(shè)計規(guī)範(fàn).2. 新增自動插件機設(shè)計規(guī)範(fàn).譚瑞梅鄭雅慧蔡育誌周有麟3 2002/8/121.修改Chip R, C Pad設(shè)計.2.新增零件Pad設(shè)計 : 0.4mm Pitch QFP, CSP, MLFP, Filter, Crystal, CP Point, Transformer, LED.3. 新增無折斷邊設(shè)計規(guī)則.4. 新增零件角度定義.5. 修正Fiducial Mark設(shè)計.6. 測試點規(guī)格變更覃桂芳鄭雅慧蔡育誌周有麟42003/8/131.修改折斷邊導(dǎo)圓角,via_hole蓋綠漆原則,最小排版尺寸,金手指no_used pin取消：2.修改SMT零件Pad設(shè)計 3.新增撈孔裂片設(shè)計原則4.新增UV點膠限制5.新增C型螺絲孔設(shè)計,橢圓孔設(shè)計,Ring Pad設(shè)計, PCB表面焊接Pin與Pad尺寸,淚滴設(shè)計覃桂芳鄭長秦黃介彥蔡育誌52004/11/1841. 增加英文對照2. 修改1808電容靠板邊設(shè)計條件(P14)3. 修改金手指設(shè)計條件(P22)4. 修改V_CUT規(guī)格(P10)5. 修改Via-hole規(guī)格(P18)6. 修改排板標(biāo)準(zhǔn)(P23/P24/P25)7. 修改高壓電容底部撈孔限制(P26)8. 修改BGA可不加辨識點條件(P30)9. 修改SMT零件Pad設(shè)計(P38/P47/P53/P59/P60)10. 增加BGA/CSP PCB表面處理限制(P48/P49)11. 刪除後焊屏蔽設(shè)計,增加易開罐式屏蔽設(shè)計(P61)12. 修改背面印膠PAD SIZE(P68,P69)13. 修改Wave solder與手焊設(shè)計規(guī)範(fàn)(P72.P73,P77,79,P80,P81,P84)14. 修改自動插件機設(shè)計規(guī)範(fàn)(P85,P91)鄭長秦黃介彥蘇柄綺吳瑞祥葉霙秋目錄 Table of Content.前言 Introduction.PCB機構(gòu)設(shè)計 Mechanical Design for PCB 1.折斷邊設(shè)計 Break-away Design Rule 1.1定位孔 Tooling Hole 1.2光學(xué)對位記號 Fiducial Mark 1.3郵票孔Routing Tab 1.4 V-形切槽 V-Cut1.5 PCB板厚規(guī)格 PCB thickness2.限制區(qū) Limitation / Restriction 2.1機構(gòu)限制區(qū) Restriction for Mechanism 2.2郵票孔限制 Restriction for routing tab 2.3 V-cut限制 Restriction for V-cut2.4 PCB外形尺寸限制 Limitation for PCB Outline Dimension2.5 銅柱製程限制 Restriction for Stand off Process 2.6 PCB變形量限制 Limitation for PCB Warpage2.7 PCB外形缺口限制(含排版) Restriction for PCB outline Slot Hole (including panelization) 2.8 TRACE限制 Restriction for Trace 2.9 VIA HOLE設(shè)計 Restriction for Via Hole 2.10測試點置放的規(guī)則及限制Restriction for Test Point3.金手指 Golden Finger4.排版 Panelization.PCB零件設(shè)計 Component Design for PCB5.零件擺置方向 Orientation of Component Placement6.光學(xué)辨識點 Fiducial Mark on QFP & BGA 6.1 金屬基板辨識點外形規(guī)格 Fiducial mark on metal PCB 6.2 PQFP & BGA辨識點外形規(guī)格 Fiducial mark on PQFP & BGA7.文字面與極性標(biāo)示 Legend and Polarity Mark 7.1表面黏著元件 Surface Mount Component (device) 7.2鑽孔元件 Drill hole component 7.3標(biāo)籤黏貼位置在文字面上的標(biāo)示 Legend for Label Position 7.4標(biāo)準(zhǔn)零件間距 Space between Components8.迴焊製程規(guī)範(fàn) Reflow Process 8.1 PAD 表面噴錫厚度 Thickness of Hot Air Solder Level 8.2迴焊製程使用PAD尺寸Pad Dimension for Reflow Process9.其它 Others.Wave Solder與手焊設(shè)計規(guī)範(fàn) Design rule for Wave Solder and Manual Soldering10.一般性規(guī)格 General Specification11. PCB 外形尺寸 PCB Dimension12.螺絲孔設(shè)計 Design for Screw Hole13.背面SMD印膠PAD SIZE Pad Design for SMD with Red Glue Printing14.零件擺放限制 Limitation of Component Placement15. PCB過錫爐方向 PCB Direction on Wave Solder16.一般零件孔徑與線徑 Hole size and Lead Diameter17.功率晶體之間距離 Pitch of Power Transistor18. PCB外形有缺口時需補齊缺口 Patch on PCB19. PCB 表面焊接PIN與PAD尺寸 Pin and Pad Dimension on PCB Surface20. 波焊製程CP點內(nèi)距 Space between CP for wave solder process21. 打鉚丁限制區(qū)域 Limitation of rivet 22. DIP與DIP 零件之間PAD距離Space between pad of DIP components. 自動插件機設(shè)計規(guī)範(fàn) Design Rule for Automatic dip machine23. R/I (立式)之Layout原則 Layout Rule for Radial Component24. R/I PCB尺寸/厚度 Dimension/Thickness of Radial Component25. R/I定位孔 Alignment hole for R/I26. R/I零件旁邊零件距離限制 Limitation of Space from R/I Component27. A/I (臥式) 之Layout原則 Layout Rule for Axial Component28. 淚滴PAD Tear Drop Pad29. A/I臥式零件與旁邊零件距離限制Limitation of space from axial component.前言 Introduction1.目的Purpose：基於生產(chǎn)製程需求，及讓電路板佈置設(shè)計，有一標(biāo)準(zhǔn)規(guī)範(fàn)可依循，並期望所佈置電路板，在組裝時，能高效率生產(chǎn)，易組裝及測試，並可得到高品質(zhì)，低成本之目標(biāo)，而製訂此規(guī)範(fàn)。This specification provides guidance to Hon Hai engineers for the design of print circuit board in all Hon Hai products. The purpose of this specification is to ensure that all PCBs designed by Hon Hai are able to have high yield, human friendly assembly and test. To meet customer requirements, getting high quality and low cost is the goal of this specification.2.適用範(fàn)圍Scope：此規(guī)範(fàn)僅適用於可攜式電腦，電源及通訊產(chǎn)品之電路板設(shè)計時使用。The design of notebook, power and communication product must meet this specification.3.修改Revise：*若對規(guī)範(fàn)內(nèi)容有建設(shè)性之意見，請反應(yīng)至製程工程單位，製程工程與相關(guān)單位討論後，進(jìn)行後續(xù)修改作業(yè)。*如有變更零件設(shè)計規(guī)格時,需更新零件包裝資料庫。*此規(guī)範(fàn)至少每半年更修一次。*Please inform manufacturing engineer if any department has any suggestion for this specification. Manufacturing engineer has to discuss it with relative department and then continuously revise this specification.*Please update component datasheet if making any change on this specification.*This specification has to be reviewed every half year.PCB機構(gòu)設(shè)計 Mechanical Design for PCB 1.折斷邊設(shè)計 Break-away Design Rule 1.1定位孔 Tooling Hole孔徑為4 +0.1/-0 mm. Hole dia=4 +0.1/-0 mm. 非鍍通孔(NPTH); Figure B . NPTH, please refer to Figure B.1.2光學(xué)對位記號 Fiducial Mark1.2.1 光學(xué)對位記號規(guī)格,如圖A. Spec. for fiducial mark , see Figure A. Figure A - : 直徑為1mm Cu pad /表面處理為化金/噴錫/化銀/OSP. Dia.1mm Cu pad,Surface treatment: Immersion gold/Immersion silver/HASL/OSP Figure A - : 直徑為3mm Solder mask/黑化或粗糙面. Dia.3mm Solder mask/ Blacked or rough surface. Figure A - : 直徑為4.5mm;線寬為1mm Cu circle/銅箔加蓋綠漆.Dia. 4.5mm, Width 1mm Cu circle/ Cu pad covered by solder mask1.2.2 上層(Top Side)光學(xué)對位記號置放位置,如圖B (Figure B). Position of fiducial mark on top side, see Figure B. Figure B - : 光學(xué)對位記號置放位置,請按圖面尺寸擺放.The position of fiducial mark please refers to Figure B.Figure B - : 遮光銅箔. (用來遮蓋下層的光學(xué)對位記號)為5mm*5mm銅箔大小加蓋綠漆.Shadow pad is used to cover the fiducial mark on lower layer. The size of it is 5*5mm pad with solder mask. Figure B - : 平衡銅點.(Dummy Pad:用來平衡電鍍的區(qū)域)其規(guī)格由各家板廠自行製訂,但距離V-Cut邊必須1mm開始鋪設(shè),且每條板邊皆須鋪設(shè),鋪設(shè)的層數(shù)與設(shè)計使用層數(shù)搭配(如四層板則鋪設(shè)四層, 二層板則鋪設(shè)二層,依此類推)除特殊狀況另由layout 工程師提供,否則皆以此規(guī)格製作.Balanced Cu pad is used to balance the electrical plating area and the specification is decided by PCB supplier. The balanced Cu pad has to be arranged on 1 mm from the V-cut edge and every dummy board has to have it. The layers of balanced Cu pad depends on how many layers on this design, For example, the balanced Cu pad is four layers if it is 4 layers PCB. Please follow this specification to make balanced Cu pad except for layout engineer illustrates specific design in advance Figure B - :板邊規(guī)格一般以10mm設(shè)計,若為特殊狀況則以工程圖面製作.Normally, Width of dummy board is 10mm. Please follow engneering drawing if it is special case.1.2.3 下層(Bottom Side)光學(xué)對位記號置放位置,如圖C(Figure C).Position of fiducial mark on top side, see Figure C. 規(guī)格同上層;光學(xué)對位記號及遮光銅箔置放的位置按圖面尺寸擺放.The specification is the same as it on top side. Fiducial mark and shadow pad are arranged according to Figure C. 另於下層需特別注意,光學(xué)對位記號距離平衡銅點至少需2.5mm,如Fig. C.Please notice the distance between fiducial mark and balanced Cu pad has to be at least 2.5mm, see Figure C.1.2.4 折斷邊之角落導(dǎo)角以半徑4mm原則設(shè)計。The radius of corner on break-away is 4mm.1.2.5今後各排版圖之折斷邊則以此規(guī)格規(guī)範(fàn)(除特殊設(shè)計另行規(guī)定標(biāo)示於排版圖上),故於排版圖上不再標(biāo)示此規(guī)格中之尺寸.The break-away must meet this specification and it is unnecessary to be marked on panel drawing.1.3郵票孔設(shè)計 Routing Tabs 五個貫穿孔的郵票孔，其規(guī)格如圖所示 Five through holes on routing tab, the specification is as below：0.5mm30mm1mmMax. distance between two routing tabs1.4 V-形切槽設(shè)計 V-Cut Design其規(guī)格及在PCB上的應(yīng)用，如圖所示:0 0.1mm上下刀偏差 Deviation between Upper and lower Knifet剩餘厚度 Thickness3045TSpecification and application on PCB are illustrated on below: V-CUT SpecificationFR-4FR-4FR-4T=3.0mm1.0mmT=0.8mmT=0.6mmt=0.4+/-0.1t=0.3+/-0.1t=0.3+/-0.1CEM-1/FR1/FR2CEM-1/FR1/FR2CEM-1/FR1/FR2CEM-1/FR1/FR2T=1.6mmT=1.2mmT=1.0mmT=0.8mmt=0.7+/-0.1t=0.6+/-0.1t=0.4+/-0.1t=0.4+/-0.1CEM-3CEM-3CEM-3CEM-3T=1.6mmT=1.2mmT=1.0mmT=0.8mmt=0.6+/-0.1t=0.5+/-0.1t=0.5+/-0.1t=0.4+/-0.11.5 PCB板厚規(guī)格 PCB Thickness PCB Thickness TolerancematerialthicknessToleranceFR-4FR-4FR-4FR-4FR-4FR-4T=2.0mmT=1.6mmT=1.2mmT=1.0mmT=0.8mmT=0.6mm+/-0.2+/-0.15+/-0.12+/-0.1+/-0.1+/-0.06CEM-1/FR1/FR2CEM-3T=1.0-1.6mm T=1.0-1.6mm+/-0.15+/-0.15Notes:s FR-4板厚大於1.6mm時，Tolerance=T*10%For FR-4 PCB with thickness over 1.6mm, the tolerance is T*10%.s FR-4板厚0.6mm(含)以下，使用郵票孔設(shè)計。For FR-4 PCB with thickness less than 0.6mm, use routing tab.2.限制區(qū)Limitation/ Restriction：2.1機構(gòu)限制區(qū) Restriction for Mechanism：以機構(gòu)圖標(biāo)示的區(qū)域為原則 Please refer to mechanical drawing：s 限高部份：標(biāo)示區(qū)域尺寸及限高，包括正面及背面部份。 Height limitation has to be illustrated on top and bottom side.s 禁止部份：標(biāo)示區(qū)域尺寸，禁止走線，禁止擺放零件。 Component and trace cannot be arranged on restricted area.LIMIT2.0mmLIMIT 2.5mmLIMIT 3.0mmLIMIT0.0mm15mm15mm50mm20mm20mm20mm Samples 限制區(qū)示意圖 Restriction drawing:- 無折斷邊設(shè)計 Non-breakaway designUnit：mm AreaTYPEABCDProcess140.2540.25SMT/DipReflow CBDAC -有折斷邊及排版時(包含折斷邊尺寸) Panel array with break-away design單位：mm AreaTYPEABCDEProcess10.50.250.50.251SMT/Dip Break-awayRestriction DA=E/2C=E/2EBEV-cut 2.2郵票孔限制 Design rule for rounting tabs 郵票孔不可在零件下。(後焊零件、PHONE-JACK及客戶機構(gòu)要求除外)Routing tab cant be located under component except for touch up, phone-jack and customer mechanical request.s 郵票孔中心距離Trace邊緣至少0.5mm。Routing tab center must keep at least 0.5mm from any trace.s 郵票孔旁不可有螺絲孔。(距離1mm)Routing tab cant be located near screw hole. (at least keep away 1mm )1mm0.25mm0.5mm1.0mm2.3 V-cut限制 V-Cut requirements V-cut距離Trace邊緣至少0.5mm。V-cut must keep away at least 0.5mm from any trace.s V-cut距離零件或PAD邊緣至少0.5mm。V-cut must keep away at least 0.5mm from SMD pad.s 距V-cut 2mm內(nèi)之06031206電容、電感易Crack之零件應(yīng)垂直V-cut，若無法垂直，則需在板邊撈孔。06031206 chip capacitor/inductor within 2mm from V-cut has to be perpendicular to V-cut. PCB has to be routed if the component cannot be perpendicular to V-cut.3mm2mmV-cut2mmOKV-cut2mm0.5mmOKOKV-cut2mms 距V-cut 5mm內(nèi)之18082210高壓電容應(yīng)垂直V-cut並在板邊撈孔，若無法垂直V-cut，應(yīng)加大撈孔範(fàn)圍並進(jìn)行Strain gage test驗證.18082210 HV chip capacitor within 5mm from V-cut has to be perpendicular to V-cut and with routing hole on the PCB breakaway. PCB has to be routed and verified by strain gage test if the component cannot be perpendicular to V-cut. 2mmV-cut5mmOK14mmV-cut5mm0.5mmOK3mmOKV-cut5mm2.4 PCB外形尺寸限制 (單位：mm) PCB dimension (unit: mm)s 最小尺寸：50L50WMinimum ：50L50Ws 最大尺寸：330L250WMaximum : 330L250Ws 厚度限制：0.53.0mmThickness : 0.53.0mms 金屬基板相關(guān)尺寸公差 Tolerance on metal PCB a. 板長，板寬：*+0/-0.1 Board length and width: +0/-0.1b.Stand off 孔徑 hole diameter：f4.4 +0.1/ -0 Stand off hole diameter：f 4.4 +0.1/ -0c.Stand off孔徑中心至板邊距離：*0.05 Center of Stand off hole to board edge: 0.05d.Stand off孔徑中心Pitch：*0.05 f4.40.1 00.050.050 0.1f4.40.1 0鋁板要求 Stand off pitch: 0.052.5 Stand Off 製程限制 Stand off金屬基板Stand Off孔徑中心外3.5mm方形範(fàn)圍內(nèi)(如圖灰色部分)不可置放零件，避免治具壓損零件。To avoid damage on component, component cannot be placed on the area, 3.5mm square from the center of the hole. 3.5mm3.5mm2.6 PCB變形量限制 PCB warpages 板彎A/B小於或等於7/1000。PCB warpage specification: A/B 7/1000 2.7 PCB外形缺口限制 (含排版) PCB outlines For SMT Process2.7.1 每單片內(nèi)缺口長寬皆大於10mm以上需補缺口Dummy board has to be designed on panel if the gap is larger than 10mm.10mm10mm10mm10mm2.8 TRACE限制 TraceConnector Pitch 0.8mm(含)以下Connector Pitch 0.8mm：a.兩個Pad間走線方式如左圖，禁止使用右圖之設(shè)計，亦不可鋪大 銅面，同時Pad 與Pad間需覆蓋防焊漆。The trace linking two pads should follow left figure, the layout shows on right figure are prohibited. Large copper pad is also not allowed. The space between two pads has to be covered by solder mask.b.由PAD拉出之TRACE寬度須PAD寬度。The width of trace must be smaller than width of pad.Bad design on tracePad(禁止 Not allow)(標(biāo)準(zhǔn) Standard)Trace2.9 VIA HOLE設(shè)計Via hole s Via Hole邊緣離PAD邊緣至少8mil，且中間以綠漆隔開。Via hole should keep away at least 8mils from pad and it has to be covered by solder mask.8milStuffed Via HoleDia.16milPadSolder maskVia HoleDia. 16mils BGA內(nèi)部之Via Hole皆需塞孔蓋綠漆。Via hole on BGA area has to be covered by solder mask.s Via Hole禁止設(shè)計於裸銅與非裸銅區(qū)中間。Via hole cannot be placed on the interface of exposed copper and solder mask.s Via Hole塞孔設(shè)計時，孔徑不可大於16mil。For stuffed via hole, the diameter of via hole has to be less than 16mil.s Via Hole不塞孔設(shè)計時，綠漆距離Via Hole邊緣2mil。For non-stuffed via hole, the solder mask should keep away 2mils from via hole. Exposed copperSolder maskVia Hole(禁止 Not allow)8mil2milSolder maskNon-stuffed Via Hole s Via Hole (Unit: mil)fBfASolder maskPCBPadfADrillfB44322824242024141210882.10測試點置放的規(guī)則及限制 Test point1.原則上，每一NET至少須留一個測試點，未置放ICT點之NET，須標(biāo)明於Layout Check List。In principle, each NET should keep a test point at least. If the NET doesnt have ICT point, it has to be marked on layout check list.2.如無法100%置放ICT測試點，則以功能測試未含蓋零件優(yōu)先置放測試點。If ICT coverage is not 100%, those components which function test can not be covered should place ICT test pad as high priority.3.測試點設(shè)計規(guī)範(fàn) Test pointa. 測試點邊緣離Pad至少8mil，且中間以綠漆分隔開。The test point should keep at least 8mils from pad and it is separated by solder mask. 8milSolder MaskTest PointPad b. 只有SMT Process之via hole，若不當(dāng)測試點，則需塞孔印防焊漆若當(dāng)測試點，則via hole做不塞孔設(shè)計，亦不印防焊漆。Via hole has to be covered by solder mask if it doesnt be used as test point. Via hole used as test point cannot be stuffed and covered by solder mask. c. 含Wave Solder Process之via hole需印或塞防焊漆，且via hole不得作為測試點，需外拉出測試Pad。For the product treated by wave solder process, via can not be test pad and has to be stuffed. An independent test pad is required. Via holeTest Pad*印防焊漆定義 Printing solder mask definition：以印刷防焊漆方式覆蓋ICT via hole的非測試面，且防焊漆不可超出另一平面 (不可沾至ICT點)。Using solder mask to cover the ICT via hole bottom and the solder mask cannot be over to the test point. d. 測試點直徑Test point diameter: (For pad design only) Standard diameter: 30mil *Minimium diameter: 20mile. 金手指可當(dāng)測試點。Golden finger can be used as test point. f. DIP零件Pad不可當(dāng)測試點。 Pad of dip component cannot be used as test point.4. 點和點之間距最少為50milSpace between two test points has to be at least 50 mils. 5. 點邊與零件邊之間距最少為8milThe space from test point to component has to be at least 8mils.6. 測試點盡量置放於同一面(因雙面治具成本加倍)。 For cost consideration, test pads have better been placed on the same side.7. PCB測試用定位孔要求 Alignment pin for ICT a.每一大片PCB須有2個以上定位孔，且孔內(nèi)不可沾錫。At least 2 alignment holes are necessary in a panel and it has to be NPTH.b.定位孔以對角線，距離最遠(yuǎn)之2孔為定位孔。Alignment holes have to be set on diagonal and any two alignment holes with the longest distance are used for fixing PCB.8. PCB改版時ICT點儘量不可更動。Dont move ICT test points as possible when PCB version is changed.3.金手指 Golden finger： 1. 為避免於組裝時,金手指插入卡槽產(chǎn)生粉屑而造成金手指接觸不良,故於金手指到板邊以不印綠漆(Solder Mask)設(shè)計。To avoid that golden finger was polluted by peeled solder mask during the assembly process, solder mask cannot be coated on the space from golden finger to board edge.2.金手指為考量導(dǎo)入卡槽，故以板邊磨斜邊的方式設(shè)計。Considering the easy assembly on socket, the shape of board edge should be bevel.3.金手指表面以鍍金或化金設(shè)計，電鍍金厚度以10inch; 化金厚度以 35inch為標(biāo)準(zhǔn).(若客戶有特殊需求以客戶需求設(shè)計)。The surface finish of golden finger has to be plating gold or immersion gold. The thickness of plated gold is 10inch and the thickness of immersion gold is 35inch. Please follow customers specification if they have any concern.4.via hole之設(shè)計Via hole:s 若為Mini PCI則via hole邊緣須距離金手指pad上緣至少10mil。For Mini PCI, the space from golden finger to via hole has to be at least 10 mils.s 若為PCI則via hole邊緣須距離金手指pad上緣至少30mil。For PCI, the space from golden finger to via hole has to be at least 30 mils.5.內(nèi)層銅箔設(shè)計Inner copper s 若為Mini PCI則內(nèi)層銅箔鋪設(shè)離板邊至少20mil。For Mini PCI, the space from inner grounding to board edge has to be at least 20 mils.s 若為PCI則內(nèi)層銅箔鋪設(shè)離