單片機(jī)外文翻譯.docx

外文資料STC89C52ProcessingChipPrimefeatures:WithMCS-51SCMproductcompatibility,8KbytesinthesystemprogrammableFlashmemory,1000timesCaXiecycle,thestaticoperation:0Hz33Hz,tripleencryptionprogrammemory,32programmedI/Oport,three16timer/counter,theeightuninterrupteddual-careerUARTserialpassage,lowpowerconsumption,leisureandfallafterfallelectricpowermodecanbeawakenedandcontinuouswatchdogtimeranddouble-numberpointer,poweridentifier.Efficacy:characteristicsSTC89C52isonekindoflowpowerconsumption,highCMOS8bitmicro-controller,8KinsystemprogrammableFlashmemory.Usehigh-densitynonvolatilestoragetechnology,andindustrial80C51productinstructionandpinfullycompatible.TheFlashmemorychipsallowsprogramsinthesystem,alsosuitableforprogrammableconventionalprogramming.Inasinglechip,haveclever8bitsCPUandonlinesystemprogrammableFlash,increaseSTC89C52formanyembeddedcontrolsystemtoprovidehighvigorousapplicationandusefulsolutions.STC89C52hasfollowingstandardefficacy:8kbyteFlashRAM,256bytes,32I/Oport,thewatchdogtimer,two,threepointernumericalounter,a6vectorlevel2continuousstructure,theserialport,workingwithincrystalsandhorologicalcircuit.Inaddition,0HzAT89S52candroptothestaticlogicoperation,supporttwosoftwarecanchoosepowersavingmode.Idlemode,theCPUtostopworking,andallowstheRAM,timer/counters,serial,continuoustowork.Protectionasanapattern,RAMcontentissurvival,vibratorsfrozen,SCM,untilalltheworkunderacontinuousorhardwarereset.8-bitmicrocontrollers8KbytesinthesystemprogrammableFlashAT89S52devices.Mouth:P0P0mouthisatwo-wayopendrainI/O.Asexport,eachcandriveeightTTLlogiclevel.ForP0porttowrite1,footasthehighimpedanceinput.Whenaccesstoexternalprogramsandnumericalmemory,alsoknownaslowP0moutheightaddress/numericalreuse.Inthismode,withtheinternalP0resistor.Intheflashwhenprogramming,alsousedforP0mouth;absorbinstructionbytesIntheprocess,theoutputcommandbytecalibration.Whentheprogramrequiresexternal,calibrationonpull-upresistors.Mouth:P1mouthP1isanrnalresistanceoftheeighttwo-wayI/Obufferscandrive,P1outputfourTTLlogiclevel.Towrite1P1port,theinternalresistancetoport,canpushasinputmouth.Whenusedasinput,externalandinternalfootbecauseoflowresistance,willoutputcurrent(IIL).Inaddition,P1.0andP1.2respectivelytimer/counter2externalcountinginput(P1.0/T2)andwhenthetriggereditor/counterP1.1input(2),specificT2EX/areshownbelow.Inprogrammingandcalibration,flashP1mouthabsorbeightaddresslowbyte.Efficacy:thefoot.P1.0T2(timer/counterT2externalcountinginput),clockoutputP1.1T2EX(timer/counterT2capture/overloadedtriggeredsignalsanddirectioncontrol),P1.5MOSI(with)onlinesystemprogramming,P1.6MISO(with)onlinesystemprogramming,P1.7SCK(with)onlinesystemprogramming,Mouth:P2P2mouthisaninternalresistanceoftheeighttwo-wayI/ObuffersandP2outputcandrivefourTTLlogiclevel.Towrite1P2port,theinternalresistancetoport,canpushasinputmouth.Whenusedasinput,externalandinternalfootbecauseoflowresistance,willoutputcurrent(IIL).Intheexternalprogrammemoryaccessoruse16bitexternalnumericalmemoryaddressread(forexampleMOVXexecutionDPTR),P2mouthsendouthigh8address.Inthisapplication,P2mouthontheinternalusestrongpullsend1.Inusing8-bitaddress(suchasMOVXRI)accesstoexternalnumericalmemory,P2mouthoutputP2latchescontent.Inprogrammingandcalibration,flashP2mouthalsoabsorbhigheightaddressbyteandsomecontrolsignal.P3:aP3mouthontheinsideoftheeighttwo-waypull-upresistorsI/Obufferscandrive,p2outputfourTTLlogiclevel.ForP3porttowrite1,theinternalresistancetoport,canpushasinputasinput,externalandinternalfootbecauseoflowresistance,willoutputcurrent(IIL).P3mouthAT89S52specialfunctions(alsoasthesecondefficacy),areshownbelow.Inprogrammingandcalibration,flashalsoabsorbsomeP3mouthcontrolsignals.Portpinsecondefficacy:P3.0RXD(serialinput)P3.1TXD(serialexport),P3.2INTOthediscontinuous(0)P3.3INT1(1)thediscontinuousP3.4(time/counterTO0)P3.5T1(1)time/counter,P3.6WR(externalnumericalmemorywritefor)P3.7RD(externalnumericalmemoryreadfor)Inaddition,alsoabsorbsomeusedinmp3mouthFLASHmemoryprogrammingandcalibrationofprogramcontrolsignals.RST,resetinput:whenthevibrator,RSTpinappearedtwomachinecycleabovehighlevelwillberesetthechip.ALE/PROG-whenaccesstoexternalprogrammemoryornumericalmemory,ALE(addresslatchallow)outputpulsesareusedtolatchaddressofloweightbytes.Normally,ALEwithclockfrequenciesare1/6outputpulsesignalwithfixed,soitcanbeusedforthepurposeoroutputclocks.TimingThosewhowantanattentionis:wheneveraccesstoexternalnumericalmemorywillskipaALEpulse.ForFLASHmemoryprogramming,thispinisusedforinputprogrammingpulse(.)PROGIfnecessary,butthroughspecialeffecttothezoneregisters(SFR)8EHD0position,theunitcanbebannedALEoperations.Thispositionisabit,MOVXandMOVCinstructionswillbeactivated.ALE-Inaddition,thefootwillbeweak,executenalprogramMCUhignshouldbebanned,avoid.SetALEPSEN-programstoragePSENallowed(outputisoutsideoftheprogrammemoryread,choosecommunicationbyexternalprogrammemorywhentakingAT89C52instructions(or),eachmachinecyclePSENtwice,twopulseoutputisuseful,duringthisperiod,whenaccesstoexternalnumericalmemory,willskipPSENtwice.EA/VPP-externalaccesspermission,tomaketheCPUonlyaccesstoexternalprogrammemory(addressfor0000H-FFFFH),EAendmustremainlowlevel(ground).Shouldnoticeis:ifaLB1isencryptedtwhenprogrammingwilllatchEAend.AsforthehighleveloftheEA(VCCS),theCPUistheimplementationoftheprogrammemoryinternalinstructions.FLASHmemorywhenprogramming,thispinplus+12vprogrammingallowpowerVpp,ofcourse,thatisthepartisusedtoVppvoltage12Vprogramming.中文翻譯STC89C52處理芯片首要性能：與MCS-51單片機(jī)產(chǎn)物兼容、8K字節(jié)在系統(tǒng)可編程Flash存儲(chǔ)器、1000次擦寫周期、全靜態(tài)操作：0Hz33Hz、三級(jí)加密程序存儲(chǔ)器、32個(gè)可編程I/O口線、三個(gè)16位定時(shí)器/計(jì)數(shù)器八個(gè)間斷源、全雙職工UART串行通道、低功耗空閑和掉電模式、掉電后間斷可喚醒、看門狗定時(shí)器、雙數(shù)值指針、掉電標(biāo)識(shí)符。功效特性描述：STC89C52是一種低功耗、高性能CMOS8位微控制器，具有8K在系統(tǒng)可編程Flash存儲(chǔ)器。使用高密度非易失性存儲(chǔ)器技術(shù)制造，與工業(yè)80C51產(chǎn)物指令和引腳完全兼容。片上Flash允許程序存儲(chǔ)器在系統(tǒng)可編程，亦適于常規(guī)編程器。在單芯片上，擁有靈巧的8位CPU和在線系統(tǒng)可編程Flash，使患上STC89C52為眾多嵌入式控制應(yīng)用系統(tǒng)提供高矯捷、超有用的解決方案。STC89C52具有以下標(biāo)準(zhǔn)功效：8k字節(jié)Flash，256字節(jié)RAM，32位I/O口線，看門狗定時(shí)器，2個(gè)數(shù)值指針，三個(gè)16位定時(shí)器/計(jì)數(shù)器，一個(gè)6向量2級(jí)間斷結(jié)構(gòu)，全雙職工串行口，片內(nèi)晶振及鐘表電路。另外，AT89S52可降至0Hz靜態(tài)邏輯操作，支持2種軟件可選擇節(jié)電模式?？臻e模式下，CPU停止工作，允許RAM、定時(shí)器/計(jì)數(shù)器、串口、間斷繼續(xù)工作。掉電保護(hù)體式，RAM內(nèi)容被生存，振動(dòng)器被凍結(jié)，單片機(jī)一切工作停止，直到下一個(gè)間斷或者硬件復(fù)位為止。8位微控制器8K字節(jié)在系統(tǒng)可編程FlashAT89S52P0口：P0口是一個(gè)8位漏極開路的雙向I/O口。作為輸出口，每位能驅(qū)動(dòng)8個(gè)TTL邏輯電平。對(duì)于P0端口寫“1”時(shí)，引腳用作高阻抗輸入。當(dāng)訪問(wèn)外部程序和數(shù)值存儲(chǔ)器時(shí)，P0口也被作為低8位地址/數(shù)值復(fù)用。在這種模式下，P0具有內(nèi)部上拉電阻。在flash編程時(shí)，P0口也用來(lái)吸收指令字節(jié)；在程序校驗(yàn)時(shí)，輸出指令字節(jié)。程序校驗(yàn)時(shí)，需要外部上拉電阻。P1口：P1口是一個(gè)具有內(nèi)部上拉電阻的8位雙向I/O口，p1輸出緩沖器能驅(qū)動(dòng)四個(gè)TTL邏輯電平。對(duì)于P1端口寫“1”時(shí)，內(nèi)部上拉電阻把端口拉高，此時(shí)可以作為輸入口使用。作為輸入使用時(shí)，被外部拉低的引腳由于內(nèi)部電阻的原因，將輸出電流（IIL）。此外，P1.0和P1.2分別作定時(shí)器/計(jì)數(shù)器2的外部計(jì)數(shù)輸入（P1.0/T2）和時(shí)器/計(jì)數(shù)器2的觸發(fā)輸入（P1.1/T2EX），具體如下表所示。在flash編程和校驗(yàn)時(shí)，P1口吸收低8位地址字節(jié)。引腳號(hào)第二功效：P1.0T2（定時(shí)器/計(jì)數(shù)器T2的外部計(jì)數(shù)輸入），鐘表輸出P1.1T2EX（定時(shí)器/計(jì)數(shù)器T2的觸發(fā)信號(hào)和方向控制）P1.5MOSI（在線系統(tǒng)編程用）P1.6MISO（在線系統(tǒng)編程用）P1.7SCK（在線系統(tǒng)編程用）P2口：P2口是一個(gè)具有內(nèi)部上拉電阻的8位雙向I/O口，P2輸出緩沖器能驅(qū)動(dòng)四個(gè)TTL邏輯電平。對(duì)于P2端口寫“1”時(shí)，內(nèi)部上拉電阻把端口拉高，此時(shí)可以作為輸入口使用。作為輸入使用時(shí)，被外部拉低的引腳由于內(nèi)部電阻的原因，將輸出電流（IIL）。在訪問(wèn)外部程序存儲(chǔ)器或者用16位地址讀取外部數(shù)值存儲(chǔ)器（例如執(zhí)行MOVXDPTR）時(shí)，P2口送出高八位地址。在這種應(yīng)用中，P2口使用很強(qiáng)的內(nèi)部上拉發(fā)送1。在使用8位地址（如MOVXRI）訪問(wèn)外部數(shù)值存儲(chǔ)器時(shí)，P2口輸出P2鎖存器的內(nèi)容。在flash編程和校驗(yàn)時(shí)，P2口也吸收高8位地址字節(jié)和一些控制信號(hào)。P3口：P3口是一個(gè)具有內(nèi)部上拉電阻的8位雙向I/O口，p2輸出緩沖器能驅(qū)動(dòng)四個(gè)TTL邏輯電平。對(duì)于P3端口寫“1”時(shí)，阻把端口拉高，此時(shí)可以作為輸入口使用。作為輸入使用時(shí)，被外部拉低的引腳由于內(nèi)部電阻的原因，將輸出電流（IIL）。P3口亦作為AT89S52特殊功效（第二功效）使用，如下表所示。在flash編程和校驗(yàn)時(shí)，P3口也吸收一些控制信