Digital Logic Circuits 數(shù)字邏輯電路知到智慧樹章節(jié)測試課后答案2024年秋南京理工大學(xué)

DigitalLogicCircuits數(shù)字邏輯電路知到智慧樹章節(jié)測試課后答案2024年秋南京理工大學(xué)第一章單元測試

Thenumberofvaluesthatcanbeassignedtoabitare(

)

A:three

B:one

C:ten

D:two

答案:two

Comparedtoanalogsystems,digitalsystems(

)

A:canhandlemuchhigherpower

B:

alloftheabove

C:

canrepresentaninfinitenumberofvalues

D:arelesspronetonoise

答案:arelesspronetonoise

Thetermbitmeans(

)

A:binarydigit

B:

bothanswers(b)and(c)

C:asmallamountofdata

D:a1ora0

答案:

bothanswers(b)and(c)

Aquantityhascontinuousvalueis(

)

A:ananalogquantity

B:anaturalquantity

C:abinaryquantity

D:adigitalquantity

答案:ananalogquantity

VerilogHDLisa(

)

A:computerlanguage

B:

hardware

C:logicdevice

D:programminglogicdevice

答案:computerlanguage

Acategoryofdigitalintegratedcircuitshavingfunctionsthatcanbealteredisknownasfixed-functionlogic.

A:對B:錯(cuò)

答案:錯(cuò)Dataareinformationonlyinnumeric.

A:對B:錯(cuò)

答案:錯(cuò)Twobroadtypesofdigitalintegratedcircuitsarefixed-functionandprogrammble.

A:對B:錯(cuò)

答案:對Thenonrecurringengineering(NRE)costforanASICdesignisnormallylow.

A:對B:錯(cuò)

答案:錯(cuò)Thereisan“invalid”regionbetweentheinputrangesforlogic0andlogic1

A:錯(cuò)B:對

答案:對

第二章單元測試

Forthebinarynumber10000,theweightofthecolumnwiththe1is(

)

A:16B:10C:

4

D:8

答案:16The2’scomplementof1000is(

)

A:0111B:1001C:1000D:1010

答案:1000Thefractionalbinarynumber0.11hasadecimalvalueof(

)

A:

?

B:?

C:noneoftheabove

D:

?

答案:?

Thenumber1100inBCDis(

)

A:

equaltodecimaleight

B:invalid

C:equaltodecimalten

D:equaltodecimaltwelve

答案:invalid

Anexampleofanunweightedcodeis(

)

A:binary

B:decimal

C:BCD

D:Graycode

答案:Graycode

Anexampleofanalphanumericcodeis(

)

A:ASCII

B:CRC

C:hexadecimal

D:BCD

答案:ASCII

Theoverflowoccurswhenaddingthefollowing8-bittwo’scomplementnumber:01011101+00110001

A:錯(cuò)B:對

答案:對TheoverflowdoesNOToccurwhenaddingthefollowing8-bittwo’scomplementnumber:10111111+11011111

A:錯(cuò)B:對

答案:對Ingeneral,weneedatmostbitstoexpresstheproductwhenmultiplyingann-bitnumberbyanm-bitnumber.

A:對B:錯(cuò)

答案:錯(cuò)Anadditionoverflowsiftheaddends’signsarethesamebutthesum’ssignisdifferentfromtheaddends’.

A:錯(cuò)B:對

答案:對

第三章單元測試

TheBooleanexpressionA

.

1isequalto(

).

A:A

B:0C:BD:1

答案:A

TheBooleanexpressionA

+1isequalto(

).

A:1B:BC:AD:0

答案:1TheBooleanequationAB+AC=A(B+C)illustrates(

)

A:

thecommutativelaw

B:

theassociativelaw

C:DeMorgan’stheorem

D:thedistributionlaw

答案:thedistributionlaw

Theassociativelawforadditionisnormallywrittenas(

)

A:AB=BA

B:A+AB=A

C:

(A+B)+C

=A

+(B+C)

D:A+B=B+A

答案:

(A+B)+C

=A

+(B+C)

ABooleanexpressionthatisinstandardSOPformis(

)

A:haseveryvariableinthedomainineveryterm

B:containsonlyoneproductterm

C:theminimumlogicexpression

D:noneoftheabove

答案:haseveryvariableinthedomainineveryterm

AdjacentcellsonaKarnaughmapdifferfromeachotherby

A:threevariables

B:answerdependsonthesizeofthemap

C:twovariables

D:

onevariable

答案:

onevariable

SOPstandardformisusefulforconstructingtruthtablesorforimplementinglogicinPLDs.

A:錯(cuò)B:對

答案:對LogicsimplificationisstillusefulinnowadaysFPGAdesigns.

A:對B:錯(cuò)

答案:錯(cuò)Insynthesis,anetlistwillbegeneratedtodescribethecircuitcompletely.

A:對B:錯(cuò)

答案:對InFPGAdesign,thestepthat“maps”thedesignfromthenetlisttofitittoatargetdeviceisknownas"programming".

A:對B:錯(cuò)

答案:錯(cuò)

第四章單元測試

The74138decodercanalsobeusedas(

).

A:

aMUX

B:

anencoder

C:noneoftheabove

D:aDEMUX

答案:aDEMUX

Assumeyouwanttodecodethebinarynumber0011withanactive-LOWdecoder.Themissinggateshouldbe(

).

A:anORgate

B:

anANDgate

C:aNORgate

D:aNANDgate

答案:aNANDgate

Toexpanda2-bitparalleladdertoa4-bitparalleladder,youmust(

).

A:usetwo2-bitaddersandconnectthesumoutputsofonetothebitinputsoftheother

B:usetwo2-bitadderswithnointerconnections

C:usefour2-bitadderswithnointerconnections

D:usetwo2-bitadderswiththecarryoutputofoneconnectedtothecarryinputoftheother

答案:usetwo2-bitadderswiththecarryoutputofoneconnectedtothecarryinputoftheother

Ifanhex-to-binarypriorityencoderhasits0,3,6,and14inputsattheactivelevel,theactive-HIGHbinaryoutputis(

).

A:0011

B:0110

C:1110

D:0000

答案:1110

ThecontinuousassignmentassignOUT=

select?A:B;specifiestheconditionthatOUT=

()

ifselect=

1,elseOUT=

()

ifselect=

0.

A:

0,1

B:B,A

C:1,0

D:

A,B

答案:

A,B

Considertheinitial

blockinthefollowing:initialbeginA=0;B=0;#10A=1;#20A=0;B=1;EndThenatt=30,Ais

changedto(

)andBto(

).

A:1,0

B:

1,1

C:0,0

D:0,1

答案:0,1

Theinitialstatementexecutesonlyonce,startingfrom

simulationtime0,andmaycontinuewithanyoperationsthataredelayedbyagiven

numberoftimeunits.

A:錯(cuò)B:對

答案:對InVerilogHDL,thedefinitionsofmodulesareallowedtobenested.

A:錯(cuò)B:對

答案:錯(cuò)ThevaluezrepresentsanunknownlogicvalueinVerilogHDL.

A:錯(cuò)B:對

答案:錯(cuò)InVerilogHDL,~(1010)is(0101),and!(1010)is0.

A:對B:錯(cuò)

答案:對

第五章單元測試

TheoutputofaDlatchwillnotchangeif(

).

A:

theoutputisLOW

B:alloftheabove

C:DisLOW

D:Enableisnotactive

答案:Enableisnotactive

TheDflip-flopshownwill(

).

A:toggleonthenextclockpulse

B:latchonthenextclockpulse

C:setonthenextclockpulse

D:resetonthenextclockpulse

答案:toggleonthenextclockpulse

FortheJ-Kflip-flopshown,thenumberofinputsthatareasynchronousis(

).

A:3B:1C:4D:2

答案:2AssumetheoutputisinitiallyHIGHonaleadingedgetriggeredJ-Kflipflop.Fortheinputsshown,theoutputwillgofromHIGHtoLOWonwhichclockpulse?

A:1B:2C:3D:4

答案:3Thetimeintervalillustratediscalled(

).

A:tPLH

B:holdtime

C:tPHL

D:set-uptime

答案:tPLH

TheadvantageofdynamicRAMoverstaticRAMisthat(

).

A:itdoesnotrequirerefreshingB:itismuchfasterC:itissimplerandcheaperD:alloftheabove

答案:itissimplerandcheaperAnasynchronous

resetsignalwilloverridetheclockonaFF.

A:對B:錯(cuò)

答案:對InVerilogHDL,aninitialbehavioralstatementexecutesonlyonce.

A:對B:錯(cuò)

答案:對InaMoore

model,theoutputsofthesequentialcircuitarenotsynchronizedwiththe

clock.

A:錯(cuò)B:對

答案:錯(cuò)TheoutputoftheMealy

machineisthevaluethatispresentimmediatelybeforethe

activeedgeoftheclock.

A:錯(cuò)B:對

答案:對

第六章單元測試

TocauseaDflip-floptotoggle,connectthe(

).

A:clocktotheD

input

B:C:clocktothepresetinput

D:

Q

outputtotheD

input

答案:A4-bitbinarycounterhasaterminalcountof(

).

A:15B:10C:4D:16

答案:15Assumetheclockfora4-bitbinarycounteris80kHz.Theoutputfrequencyofthefourthstage(Q3)is(

).

A:5kHz

B:10kHz

C:20kHz

D:320kHz

答案:5kHz

A4-bitparallel-in/parallel-outshiftregisterwillstoredatafor(

).

A:2clockperiods

B:4clockperiods

C:3clockperiods

D:1clockperiod

答案:1clockperiod

AnadvantageofaringcounteroveraJohnsoncounteristhattheringcounter(

).

A:allowsonlyonebittochangeatatime

B:isself-decoding

C:isclearedaftereachcycle

D:hasmorepossiblestatesforagivennumberofflip-flops

答案:isself-decoding

Apossiblesequencefora4-bitringcounteris(

).

A:…1111,1110,1101…

B:…0000,0001,0010…

C:

…0001,0011,0111…

D:

…1000,0100,0010…

答案:

…1000,0100,0010…

Adivide‐by‐N-counterisacounterthatgoesthrougharepeated

sequenceofNstates,anditisalsoknownasamodulo‐Ncounter.

A:對B:錯(cuò)

答案:對Forcounterswithunusedstates,itisnecessarytoensurethatthecircuiteventuallygoesintooneofthevalidstatessothatitcanresumenormaloperation.

A:錯(cuò)B:對

答案:對Fortransmission,datafromaUARTissentin

synchronousparallelform.

A:錯(cuò)B:對

答案:錯(cuò)Themaximummodulusofacounteris,

wherenisthenumberofstages(flip-flops)inthecounter.

A:對B:錯(cuò)

答案:錯(cuò)

第七章單元測試

StaticRAMis(

).

A:nonvolatilereadonlymemory

B:volatileread/writememory

C:volatilereadonlymemory

D:

nonvolatileread/writememory

答案:volatileread/writememory

Anonvolatilememoryisonethat(

)

A:

requiresaclock

B:

retainsdatawithoutpowerapplied

C:mustberefreshedregularly

D:alloftheabove

答案:

retainsdatawithoutpowerapplied

TheadvantageofdynamicRAMoverstaticRAMisthat(

).

A:alloftheabove

B:itdoesnotrequirerefreshing

C:itismuchfaster

D:itissimplerandcheaper

答案:itissimplerandcheaper

A4-bitparallel-in/parallel-outshiftregisterwillstoredatafor(

).

A:1clockperiod

B:2clockperiodC:4clockperiodD:3clockperiod

答案:1clockperiod

WhendataisreadfromRAM,thememorylocationis(

).

A:settoall1’safterthereadoperation

B:clearedafterthereadoperation

C:destroyed

D:unchanged

答案:unchanged

Thefirststepinareadorwriteoperationforarandomaccessmemoryisto(

).

A:startarefreshcycle

B:

sendorobtainthedata

C:placeavalidaddressontheaddressbus

D:enablethememory

答案:placeavalidaddressontheaddressbus

AddressmultiplexingcanreducethenumberofpinsintheICpackage.

A:對B:錯(cuò)

答案:對OneofthemajorapplicationsofSRAMsisincachememoriesincomputers.

A:對B:錯(cuò)

答案:對RAMisusedinacomputerto

storetheBIOS(BasicInput/Output

System.

A:對B:錯(cuò)

答案:錯(cuò)Memoryexpansion

isaccomplishedbyaddinganappropriatenumberofmemorychipstotheaddress,data,

andcontrolbuses.

A:對B:錯(cuò)

答案:對

第八章單元測試

Thenumberofcomparatorsrequiredina10-bitflashADCis(

).

A:511

B:4095

C:1023

D:255

答案:1023

Ifananti-aliasingfilterisnotusedindigitizingasignaltherecoveryprocess(

)

A:mayincludealiassignals

B:isslowed