fpga課程設(shè)計報告

1、文華學院f p g a課程設(shè)計報告專業(yè)：電子信息工程班級：電信三班學號：0901020312345姓名：雷帆設(shè)計課題1：設(shè)計一個可控的100進制可逆計數(shù)器，要求用實驗箱下載。計數(shù)器的時鐘輸入信號周期為200ns。以十進制形式顯示。有一個復位端clr和兩個控制端plus和minus，在這些控制信號的作用下，計數(shù)器具有復位、增或減計數(shù)、暫停功能。clrplusminus功能0復位為0110遞增計數(shù)101遞減計數(shù)111暫停計數(shù)1、源程序（附注釋）：（1）module counter100(out,clk,clr,plus,minus);output7:0 out;input clk,plus,min

2、us,clr;reg 7:0 out;always (posedge clk)begin if (!clr) out=0; /若clr為0 將計數(shù)復位為0 else begin case (plus,minus) 2b10:begin /若plus為1并且minus為0 if (out3:0=9) /若計數(shù)低四位為9 begin out3:0=0; /將低四位置0 if (out7:4=9) out7:4=0; /若高四位為9 則將高四位置0 else out7:4=out7:4+1; /否則將高四位加1 end else out3:0=out3:0+1; /若計數(shù)低四位不為9則加1 end

3、2b01:begin /若plus為0并且minus為1 if (out3:0=0) /若低四位為0 begin out3:0=9; /低四位置9 if (out7:4=0) out7:4=9; /若高四位為0 高四位置9 else out7:4=out7:4-1; /否則高四位減1 end else out3:0=out3:0-1; /若計數(shù)低四位不為0則減1 end 2b11: out=out; /若plus和minus同時為1 計數(shù)為原值不變 default:out programmer，并單擊start.設(shè)計課題2：交通燈控制系統(tǒng)，要求用實驗箱下載。（1） 設(shè)計一個十字路口交通信號燈的

4、定時控制電路。要求紅、綠燈按一定的規(guī)律亮和滅，綠燈亮時，表示該車道允許通行；紅燈亮時，該車道禁止通行。并在亮燈期間進行倒計時，并將運行時間用數(shù)碼管顯示出來。（2）要求主干道每次通行時間為40秒，支干道每次通行時間為30秒。每次變換運行車道前綠燈閃爍，持續(xù)時間為5秒。即車道要由主干道轉(zhuǎn)換為支干道時，主干道在通行時間只剩5秒鐘時，綠燈閃爍5秒顯示，支干道仍為紅燈，以便主干道上已過停車線的車繼續(xù)通行，未過停車線的車停止通行。同理，當車道由支干道轉(zhuǎn)換為主干道時，支干道綠燈閃爍顯示5秒鐘，主干道仍為紅燈。（3）定時器要求采用遞減計時方式進行計時。hg、hr分別表示主干道的綠燈和紅燈cg、cr分別表示支干

5、道的綠燈和紅燈兩個定時時間：綠燈閃爍和綠燈停止閃爍源程序（附注釋）：（1）module traffic00 (clk,en,lampar,fag,lampbr,fbg,numa,numb);input clk,en;output 7:0numa,numb;reg 7:0numa,numb;/計時顯示output fag,fbg,lampar,lampbr; /fag:flash a greenreg lampar,lampag,lampbr,lampbg;/表示主路?路共四個燈reg tempa,tempb; /裝入計數(shù)reg 2:0 counta,countb;/燈亮的順序reg 7:0 a

6、red,agreen,bred,bgreen;always (en) if(!en) begin / 設(shè)置各種燈的預置數(shù) ared =8b00110000; agreen =8b01000000; bred =8b01000000; bgreen =8b00110000; endalways (posedge clk) begin if(en) begin if(!tempa) begin tempa=1; case(counta) /控制燈亮的順序 0: begin numa=agreen;lampag=1;lampar=0;counta=1; end 1: begin numa=ared;

7、 lampag=0;lampar=1;counta=0; end default: lampar8b00000001) begin if(numa3:0=0) begin numa3:0=4b1001; numa7:4=numa7:4-1;end else numa3:0=numa3:0-1; end if(numa=8b0000010) tempa=0; end end else begin lampar=1;lampag=0;counta=0;tempa=0; end end always (posedge clk) /該進程控制b方向的四種燈 begin if(en) begin if(

8、!tempb) begin tempb=1; case (countb) 0: begin numb=bred; lampbr=1;lampbg=0;countb=1; end 1: begin numb=bgreen;lampbr=0;lampbg=1;countb=0; end default: lampbg8b00000001) /倒計時 if(numb3:0=0) begin numb3:0=9; numb7:4=numb7:4-1; end else numb3:0=numb3:0-1; if(numb=2) tempb=0; end end else begin lampbr=1;

9、lampbg=0;tempb=0; countb5)?(lampag?1:0):clk&lampag; /主干道綠燈倒數(shù)5秒閃耀assign fbg=(numb5)?(lampbg?1:0):clk&lampbg; /?干道綠燈倒數(shù)5秒閃耀endmodule（2）module decode4_7 ( input 3:0 indec_0,indec_1,indec_2,indec_3,indec_4,indec_5,indec_6,indec_7, output reg 6:0 dout_0,dout_1,dout_2,dout_3,dout_4,dout_5,dout_6,dout_7);al

10、ways(indec_0 or indec_1 or indec_2 or indec_3 or indec_4 or indec_5 or indec_6 or indec_7 ) begin case(indec_0) 4h1: dout_0 = 7b111_1001; / -0- 4h2: dout_0 = 7b010_0100; / | | 4h3: dout_0 = 7b011_0000; / 5 1 4h4: dout_0 = 7b001_1001; / | | 4h5: dout_0 = 7b001_0010; / -6- 4h6: dout_0 = 7b000_0010; /

11、| | 4h7: dout_0 = 7b111_1000; / 4 2 4h8: dout_0 = 7b000_0000; / | | 4h9: dout_0 = 7b001_1000; / -3- 4ha: dout_0 = 7b000_1000; 4hb: dout_0 = 7b000_0011; 4hc: dout_0 = 7b100_0110; 4hd: dout_0 = 7b010_0001; 4he: dout_0 = 7b000_0110; 4hf: dout_0 = 7b000_1110; 4h0: dout_0 = 7b100_0000; endcase case(indec

12、_1) 4h1: dout_1 = 7b111_1001; / -0- 4h2: dout_1 = 7b010_0100; / | | 4h3: dout_1 = 7b011_0000; / 5 1 4h4: dout_1 = 7b001_1001; / | | 4h5: dout_1 = 7b001_0010; / -6- 4h6: dout_1 = 7b000_0010; / | | 4h7: dout_1 = 7b111_1000; / 4 2 4h8: dout_1 = 7b000_0000; / | | 4h9: dout_1 = 7b001_1000; / -3- 4ha: dou

13、t_1 = 7b000_1000; 4hb: dout_1 = 7b000_0011; 4hc: dout_1 = 7b100_0110; 4hd: dout_1 = 7b010_0001; 4he: dout_1 = 7b000_0110; 4hf: dout_1 = 7b000_1110; 4h0: dout_1 = 7b100_0000; endcase case(indec_2) 4h1: dout_2 = 7b111_1001; / -0- 4h2: dout_2 = 7b010_0100; / | | 4h3: dout_2 = 7b011_0000; / 5 1 4h4: dou

14、t_2 = 7b001_1001; / | | 4h5: dout_2 = 7b001_0010; / -6- 4h6: dout_2 = 7b000_0010; / | | 4h7: dout_2 = 7b111_1000; / 4 2 4h8: dout_2 = 7b000_0000; / | | 4h9: dout_2 = 7b001_1000; / -3- 4ha: dout_2 = 7b000_1000; 4hb: dout_2 = 7b000_0011; 4hc: dout_2 = 7b100_0110; 4hd: dout_2 = 7b010_0001; 4he: dout_2

15、= 7b000_0110; 4hf: dout_2 = 7b000_1110; 4h0: dout_2 = 7b100_0000; endcase case(indec_3) 4h1: dout_3 = 7b111_1001; / -0- 4h2: dout_3 = 7b010_0100; / | | 4h3: dout_3 = 7b011_0000; / 5 1 4h4: dout_3 = 7b001_1001; / | | 4h5: dout_3 = 7b001_0010; / -6- 4h6: dout_3 = 7b000_0010; / | | 4h7: dout_3 = 7b111_

16、1000; / 4 2 4h8: dout_3 = 7b000_0000; / | | 4h9: dout_3 = 7b001_1000; / -3- 4ha: dout_3 = 7b000_1000; 4hb: dout_3 = 7b000_0011; 4hc: dout_3 = 7b100_0110; 4hd: dout_3 = 7b010_0001; 4he: dout_3 = 7b000_0110; 4hf: dout_3 = 7b000_1110; 4h0: dout_3 = 7b100_0000; endcase case(indec_4) 4h1: dout_4 = 7b111_

17、1001; / -0- 4h2: dout_4 = 7b010_0100; / | | 4h3: dout_4 = 7b011_0000; / 5 1 4h4: dout_4 = 7b001_1001; / | | 4h5: dout_4 = 7b001_0010; / -6- 4h6: dout_4 = 7b000_0010; / | | 4h7: dout_4 = 7b111_1000; / 4 2 4h8: dout_4 = 7b000_0000; / | | 4h9: dout_4 = 7b001_1000; / -3- 4ha: dout_4 = 7b000_1000; 4hb: d

18、out_4 = 7b000_0011; 4hc: dout_4 = 7b100_0110; 4hd: dout_4 = 7b010_0001; 4he: dout_4 = 7b000_0110; 4hf: dout_4 = 7b000_1110; 4h0: dout_4 = 7b100_0000; endcase case(indec_5) 4h1: dout_5 = 7b111_1001; / -0- 4h2: dout_5 = 7b010_0100; / | | 4h3: dout_5 = 7b011_0000; / 5 1 4h4: dout_5 = 7b001_1001; / | |

19、4h5: dout_5 = 7b001_0010; / -6- 4h6: dout_5 = 7b000_0010; / | | 4h7: dout_5 = 7b111_1000; / 4 2 4h8: dout_5 = 7b000_0000; / | | 4h9: dout_5 = 7b001_1000; / -3- 4ha: dout_5 = 7b000_1000; 4hb: dout_5 = 7b000_0011; 4hc: dout_5 = 7b100_0110; 4hd: dout_5 = 7b010_0001; 4he: dout_5 = 7b000_0110; 4hf: dout_

20、5 = 7b000_1110; 4h0: dout_5 = 7b100_0000; endcase case(indec_6) 4h1: dout_6 = 7b111_1001; / -0- 4h2: dout_6 = 7b010_0100; / | | 4h3: dout_6 = 7b011_0000; / 5 1 4h4: dout_6 = 7b001_1001; / | | 4h5: dout_6 = 7b001_0010; / -6- 4h6: dout_6 = 7b000_0010; / | | 4h7: dout_6 = 7b111_1000; / 4 2 4h8: dout_6

21、= 7b000_0000; / | | 4h9: dout_6 = 7b001_1000; / -3- 4ha: dout_6 = 7b000_1000; 4hb: dout_6 = 7b000_0011; 4hc: dout_6 = 7b100_0110; 4hd: dout_6 = 7b010_0001; 4he: dout_6 = 7b000_0110; 4hf: dout_6 = 7b000_1110; 4h0: dout_6 = 7b100_0000; endcase case(indec_7) 4h1: dout_7 = 7b111_1001; / -0- 4h2: dout_7

22、= 7b010_0100; / | | 4h3: dout_7 = 7b011_0000; / 5 1 4h4: dout_7 = 7b001_1001; / | | 4h5: dout_7 = 7b001_0010; / -6- 4h6: dout_7 = 7b000_0010; / | | 4h7: dout_7 = 7b111_1000; / 4 2 4h8: dout_7 = 7b000_0000; / | | 4h9: dout_7 = 7b001_1000; / -3- 4ha: dout_7 = 7b000_1000; 4hb: dout_7 = 7b000_0011; 4hc:

23、 dout_7 = 7b100_0110; 4hd: dout_7 = 7b010_0001; 4he: dout_7 = 7b000_0110; 4hf: dout_7 = 7b000_1110; 4h0: dout_7 = 7b100_0000; endcase endendmodule/dividermodule div( output reg o_clk, /輸出時鐘 input rst_n, /復位 input i_clk /輸入時鐘 ); parameter n=50_000_000; /分頻的倍數(shù) parameter m=24_999_999; /n/2-1 reg 25:0cn

24、t; always (posedge i_clk or negedge rst_n) begin if(!rst_n) cnt=26b0; else begin if(cnt=n-1) cnt=26b0; else cnt=cnt+26b1; end end always (posedge i_clk or negedge rst_n) begin if(!rst_n) o_clk=0; else begin if(cnt=m) o_clk=1; else o_clk=0; end end endmodulemodule div_zh(f,_500hzout,_1khzout, ncr,clo

25、ck_50,s); input ncr,clock_50,s; output _500hzout,_1khzout,f; wire _1hzout,_5hzout; assign f=s?_5hzout:_1hzout; divn #(.width(26),.n(50000000) u0(.clk(clock_50), .rst_n(ncr), .o_clk(_1hzout) ); divn #(.width(17),.n(100000) u1(.clk(clock_50), .rst_n(ncr), .o_clk(_500hzout) ); divn #(.width(16),.n(5000

26、0) u2(.clk(clock_50), .rst_n(ncr), .o_clk(_1khzout) ); divn #(.width(24),.n(10000000) u3(.clk(clock_50), .rst_n(ncr), .o_clk(_5hzout) ); endmodulemodule divn(o_clk,clk,rst_n); input clk,rst_n; output o_clk; parameter width=3; parameter n=6; reg width-1:0 cnt_p; reg width-1:0 cnt_n; reg clk_p; reg cl

27、k_n; assign o_clk=(n=1)? clk:(n0?(clk_p|clk_n):clk_p); always (posedge clk or negedge rst_n) begin if(!rst_n) cnt_p=0; else if(cnt_p=n-1) cnt_p=0; else cnt_p=cnt_p+1; end always (posedge clk or negedge rst_n) begin if(!rst_n) clk_p=0; else if(cnt_p1) clk_p=1; else clk_p=0; end always (negedge clk or

28、 negedge rst_n) begin if(!rst_n) cnt_n=0; else if(cnt_n=n-1) cnt_n=0; else cnt_n=cnt_n+1; end always (negedge clk or negedge rst_n) begin if(!rst_n) clk_n=0; else if(cnt_n1) clk_n=1; else clk_n programmer，并單擊start.設(shè)計課題3：多功能數(shù)字鐘系統(tǒng)（層次化設(shè)計），要求用實驗箱下載。（1）基本功能：60秒60分24小時。（2）擴展功能：報時；每小時59分51,53,55,57秒低頻報時，59

29、秒高頻報時。校時校分；時段控制；6點18點 輸出燈不亮，其它時間燈亮。獨立設(shè)計除上述3種功能以外的擴展功能，可加分。1、源程序（附注釋）及波形圖：（1）分鐘、秒計時模塊module m60(m,cp60m,cpm,rd);output7:0m;output cp60m;input cpm;input rd;reg 7:0m;wire cp60m;always(negedge rd or posedge cpm) begin if(!rd) /若rd為零 begin m7:0=0; / 則計數(shù)清零 end else begin if(m7:4=5)&(m3:0=9) /若計數(shù)到59 begin

30、m7:0=0; /則計數(shù)復位為0 end else begin if(m3:0=9) /若計數(shù)低四位為9 begin m3:0=0; /將低四位置0 if(m7:4=5) /若高四位為5 begin m7:4=0;end /則將高四位置0 else m7:4=m7:4+1; /否則將高四位加1 end else m3:0=m3:0+1; /若計數(shù)低四位不為9則加1 end end endassign cp60m=(m6&m4&m3&m0); /二進制 6 4 3 0位為1時cp60m改變endmodule（2）小時計時模塊：module m24(h,cph,rd);output 7:4h;input cph,rd;reg7:0h;always (negedge rd or posedge cph) begin if(!rd) h7:0=0; /若rd為零 則計數(shù)清零 else begin if(h7:4=2)&(h3:0=3) /若高四位為2低四位為3 begin h7:0=0; /則計數(shù)清零 end else begin if(h3:0=9) /若低四位為9 begin h3:0=0; /則低四位置0 h7:4=h7:4+1; /高四位加1 end else h3:0=h3:0+1; /若低四位