通信工程中英文對照外文翻譯文獻

中英文對照外文翻譯(文檔含英文原文和中文翻譯)外文:StructureandfunctionoftheMCS-51seriesStructureandfunctionoftheMCS-51seriesone-chipcomputerMCS-51isanameofapieceofone-chipcomputerserieswhichIntelCompanyproduces.Thiscompanyintroduced8top-gradeone-chipcomputersofMCS-51seriesin1980afterintroducing8one-chipcomputersofMCS-48seriesin1976.Itbelongtoalotofkindsthislineofone-chipcomputerthechipshave,suchas8051,8031,8751,80C51BH,80C31BH,etc.,theirbasiccomposition,basicperformanceandinstructionsystemareallthesame.8051dailyrepresentatives-51serialone-chipcomputer.Anone-chipcomputersystemismadeupofseveralfollowingparts:(1)Onemicroprocessorof8(CPU).(2)AtslicedatamemoryRAM(128B/256B),itusedtodepositingnotcanreading/datathatwrite,suchasresultnotmiddleofoperation,finalresultanddatawantedtoshow,etc.(3)ProcedurememoryROM/EPROM(4KB/8KB),isusedtopreservetheprocedure,someinitialdataandforminslice.ButdoesnottakeROM/EPROMwithinsomeone-chipcomputers,suchas8031,8032,80C,etc..(4)Four8runsidebysideI/OinterfaceP0fourP3,eachmouthcanuseasintroduction,mayuseasexportingtoo.(5)Twotimer/counter,eachtimer/countermaysetupandcountintheway,usedtocounttotheexternalincident,cansetupintoatimingwaytoo,andcanaccordingtocountorresultoftimingrealizetheontrolofthecomputer.(6)Fivecutoffcuttingoffthecontrolsystemofthesource.(7)OneallduplexserialI/OmouthofUART(universalasynchronousreceiver/transmitter(UART)),isitrealizeone-chipcomputerorone-chipcomputerandserialcommunicationofcomputertousefor.(8)Stretchoscillatorandclockproducecircuit,quartzcrystalfinelytuneelectriccapacityneedouter.Allowoscillationfrequencyas12nowatmost.Everytheabove-mentionedpartwasjoinedthroughtheinsidedatabus.Amongthem,CPUisacoreoftheone-chipcomputer,itisthecontrolofthecomputerandcommandcentre,madeupofsuchpartsasarithmeticunitandcontroller,etc..Thearithmeticunitcancarryon8personsofarithmeticoperationandunitALUoflogicoperationwhileincludingone,the1storingdevicetemporarilyof8,storingdevice2temporarily,8'saccumulationdeviceACC,registerBandprocedurestateregisterPSW,etc.PersonwhoaccumulateACCcountby2inputendsenteredofcheckingetc.temporarilyasoneoperationoften,comefrompersonwhostore1operationisitisitmakeoperationtogoontocounttemporarily,operationresultandloopbackACCwithanotherone.Inaddition,ACCisoftenregardedasthetransferstationofdatatransmissionon8051inside.Thesameasgeneralmicroprocessor,itisthebusiestregister.HelprememberingthatagreeingwithAexpressesintheorder.Thecontrollerincludestheprocedurecounter,theorderisdeposited,theorderdecipher,theoscillatorandtimingcircuit,etc.Theprocedurecounterismadeupofcounterof8fortwo,amountsto16.Itisabyteaddresscounteroftheprocedureinfact,thecontentisthenextIAthatwillcarriedoutinPC.Thecontentwhichchangesitcanchangethedirectionthattheprocedurecarriesout.Shakethecircuitin8051one-chipcomputers,onlyneedouterquartzcrystalandfrequencytofinelytunetheelectriccapacity,itsfrequencyrangeisits12MHZof1.2MHZ.Thispulsesignal,as8051basicbeatsofworking,namelytheminimumunitoftime.8051isthesameasothercomputers,theworkinharmonyunderthecontrolofthebasicbeat,justlikeanorchestraaccordingtothebeatplaythatiscommanded.ThereareROM(procedurememory,canonlyread)andRAMin8051slices(datamemory,canisitcanwrite)twotoread,theyhaveeachindependentmemoryaddressspace,disposewaytobethesamewithgeneralmemoryofcomputer.Procedure8051memoryand8751sliceprocedurememorycapacity4KB,addressbeginfrom0000H,usedforpreservingtheprocedureandformconstant.Data8051-87518031ofmemorydatamemory128B,addressfalse00FH,useformiddleresulttodepositoperation,thedataarestoredtemporarilyandthedataarebufferedetc..InRAMofthis128B,thereisunitof32bytesthatcanbeappointedasthejobregister,thisandgeneralmicroprocessorisdifferent,8051sliceRAMandjobregisterrankoneformationthesametoarrangethelocation.ItisnotverythesamethatthememoryofMCS-51seriesone-chipcomputerandgeneralcomputerdisposesthewayinaddition.Generalcomputerforfirstaddressspace,ROMandRAMcanarrangeindifferentspacewithintherangeofthisaddressatwill,namelytheaddressesofROMandRAM,withdistributingdifferentaddressspaceinaformation.Whilevisitingthememory,correspondingandonlyanaddressMemoryunit,canROM,itcanbeRAMtoo,andbyvisitingtheordersimilarly.ThiskindofmemorystructureiscalledthestructureofPrinceton.8051memoriesaredividedintoprocedurememoryspaceanddatamemoryspaceonthephysicsstructure,therearefourmemoryspacesinall:Theprocedurestoresinoneanddatamemoryspaceoutsidedatamemoryandoneinprocedurememoryspaceandoneoutsideone,thestructureformsofthiskindofproceduredeviceanddatamemoryseparatedformdatamemory,calledHarvardstructure.Butusetheanglefromusers,8051memoryaddressspaceisdividedintothreekinds:(1)Intheslice,arrangeblocksofFFFFH,0000Hoflocation,inunisonoutsidetheslice(use16addresses).(2)Thedatamemoryaddressspaceoutsideoneof64KB,theaddressisarrangedfrom0000H64KBFFFFH(with16addresses)tootothelocation.(3)Datamemoryaddressspaceof256B(use8addresses).Threeabove-mentionedmemoryspaceaddressesoverlap,fordistinguishinganddesigningtheordersymbolofdifferentdatatransmissionintheinstructionsystemof8051:CPUvisitslice,ROMorderspendMOVC,visitblockRAMorderusesMOVXoutsidetheslice,RAMorderusesMOVtovisitinslice.8051one-chipcomputerhavefour8walkabreastI/Oport,callP0,P1,P2andP3.Eachportis8accuratetwo-waymouths,accountsfor32pinsaltogether.EveryoneI/Olinecanbeusedasintroductionandexportedindependently.Eachportincludesalatch(namelyspecialfunctionregister),oneexportsthedriverandaintroductionbuffer.Makedatacanlatchwhenoutputting,datacanbufferwhenmakingintroduction,butfourfunctionofpasswaytheseself-same.Expandamongthesystemofmemoryoutsidehavingslice,fourportthesemayserveasaccuratetwo-waymouthofI/Oincommonuse.Expandamongthesystemofmemoryoutsidehavingslice,P2mouthseehigh8addressoff;P0mouthisatwo-waybus,sendtheintroductionof8lowaddressesanddata/exportintimesharingThecircuitof8051one-chipcomputersandfourI/Oportsisveryingeniousindesign.FamiliarwithI/Oportlogicalcircuit,notonlyhelptouseportscorrectlyandrationally,andwillinspiretodesigningtheperipherallogicalcircuitofone-chipcomputertosomeextent.Loadabilityandinterfaceofporthavecertainrequirement,becauseoutputgrade,P0ofmouthandP1endoutput,P3ofmouthgradedifferentatstructure,so,theloadabilityandinterfaceofitsdoordemandtohavenothingincommonwitheachother.P0mouthisdifferentfromothermouths,itsoutputgradedrawstheresistancesupreme.Whenusingitasthemouthincommonusetouse,outputgradeisitleakcircuittoturnon,isitisiturgeNMOSdrawtheresistanceontakingtobeouterwithitwhileinputtingtogoouttofail.Whenbeingusedasintroduction,shouldwrite"1"toalatchfirst.EveryonewithP0mouthcandrive8ModelLSTTLloadtoexport.P1mouthisanaccuratetwo-waymouthtoo,usedasI/Oincommonuse.DifferentfromP0mouthoutputofcircuitits,drawloadresistancelinkwithpoweroninsidehave.Infact,theresistanceisthattwoeffectsareinchargeofFETandtogether:OneFETisinchargeofload,itsresistanceisregular.Anotheronecanisitleadtoworkwithcloseattwostate,makeitsPresidentresistancevaluechangeapproximate0orgroupvalueheavytwosituationvery.Whenitis0thattheresistanceisapproximate,candrawthepintothehighlevelfast/view/9ca78b07caaedd3383c4d383.html?from=search4/6Whenresistancevalueisverylarge,P1mouth,inordertohindertheintroductionstatehigh.OutputasP1mouthhighelectricityatordinarytimes,canisitdrawelectriccurrentloadtoofferoutwards,drawtheresistanceonneedn'tanswerandthen.Herewhentheportisusedasintroduction,mustwriteinto1tothecorrespondinglatchfirsttoo,makeFETend.ThestructureofP2somemouthissimilartoP0mouth,thereareMUXswitches.Isitsimilartomouthpartlytourge,butmouthlargeaconversioncontrolssomethanP1.P3mouthonemulti-functionalport,mouthgettingmanythanP1ithave"and"3doorand4buffer".Twopartthese,makeherbesidesaccuratetwo-wayfunctionwithP1mouthjust,canalsousethesecondfunctionofeverypin,"and"door3functiononeswitchinfact,itdeterminestobetooutputdataoflatchtooutputsecondsignaloffunction.ActasW=At1o'clock,outputQendsignal;ActasQ=At1o'clock,canoutputWlinesignal.Atthetimeofprogramming,itisthatthefirstfunctionisstillthesecondfunctionbutneedn'thavesoftwarethatsetupP3mouthinadvance.IthardwarenotinsideistheautomatictohavetwofunctionoutputtedwhenCPUcarriesonSFRandseeksthelocation(thelocationorthebyte)tovisittoP3mouth/atnotlastinglining,thereareinsidehardwarelatchQs=1.TheoperationprincipleofP3mouthissimilartoP1mouth.Outputgrade,P3ofmouth,P1ofP1,connectwithinsidehaveloadresistanceofdrawing,everyoneoftheycandrive4ModelLSTTLloadtooutput.Aswhileinputtingthemouth,anyTTLorNMOScircuitcandriveP1of8051one-chipcomputersasP3mouthinanormalway.Becausedrawresistanceonoutputgradeofthemhave,canopenawaycollectortooordrain-sourceresistanceisiturgetoopenaway,donotneedtohavetheresistanceofdrawingouter.Mouthsareallaccuratetwo-waymouthstoo.Whentheconductisinput,mustwritethecorrespondingportlatchwith1first.Asto80C51one-chipcomputer,portcanonlyoffermilliampereofoutputelectriccurrents,isitoutputmouthgowhenurgingoneordinarybasingoftransistortoregardas,shouldcontactaresistanceamongtheportandtransistorbase,inordertotheelectricitywhilerestrainingthehighlevelfromexportingP1~P3Beingrestoredtothethroneistheoperationofinitializingofanone-chipcomputer.ItsmainfunctionistoturnPCinto0000Hinitially,maketheone-chipcomputerbegintoholdtheconductprocedurefromunit0000H.Exceptthattheonesthatenterthesystemareinitializednormally,asbecauseprocedureoperateitmakemistakesoroperatetherearen'tmistake,inordertoextricateoneselffromapredicament,needtobepressedandrestoredtothethronethekeyrestartingtoo.Itisaninputendwhichisrestoredtothethronethesignalin8051ChinaRSTpin.Restoretothethronesignalhighleveleffective,shouldsustain24shakecycle(namely2machinecycles)theaboveitseffectivetimes.If6offrequencyofutilizationbrillianttoshake,restoretothethronesignaldurationshouldexceed4delicatetofinishrestoringtothethroneandoperating.Producethelogicpictureofcircuitwhichisrestoredtothethronethesignal。Restoretothethronethecircuitandincludetwopartsoutsideinthechipentirely.Outsidethatcircuitproducetorestoretothethronesignal(RST)handovertoSchmitt'strigger,restoretothethronecircuitsampletooutput,SchmittoftriggerconstantlyineachS5P2,machineofcycleinhavingonemore,thenjustgotandrestoredtothethroneandoperatedthenecessarysignalinsidly.Restoretothethroneresistanceofcircuitgenerally,electriccapacityparametersuitableshake,canisitrestoretothethronesignalhighleveldurationgreatefrotrha6nb2rimlliaacnhtintoecyclestoguarantee.Beingrestoredtothethroneinthecircuitissimple,itsfunctionisveryimportant.Piecesofone-chipcomputersystemcouldnormalrunning,shouldfirstcheckitcanrestoretothethronenotsucceeding.Checkingandcanpopone'sheadandmonitorthepinwiththeoscillographtentatively,pushandisrestoredtothethronethekey,thewaveformthatobservesandhasenoughrangeisexported(instantaneous),canalsothroughisitrestoretothethronecircuitgroupholdingvaluecarryontheexperimenttochange.

中文文獻51系列單片機的結(jié)構(gòu)和功能51系列單片機是英特爾公司生產(chǎn)的具有一定結(jié)構(gòu)和功能的單片機產(chǎn)品。這家公司在1976年引入8位MCS-48系列單片機后，于1980年又推出了8位高檔的MCS-51系列單片機。它包含很多種這類型的單片機，如8051，8031，8751，80C51BH，80C31BH等，它們的基本組成，基本性能和指令系統(tǒng)都是一樣的。一般情況習慣用8051來代表51系列單片機。一個單片機的系統(tǒng)是由以下幾部分組成：（1）一個8位CPU微處理器。（2）靜態(tài)隨機存取存儲器，能夠儲存程序運行過程中產(chǎn)生的數(shù)據(jù)。（3）程序存儲器ROM/EPROM中（4KB/8KB），用來保存程序和一些初始數(shù)據(jù)。但是在一些單片機中不使用ROM/EPROM中，如8031，8032，80c系列等。（4）4個8排的I/O并行接口P0~P3，每個口可以用作輸入，也可以用作輸出。（5）2個定時器/計數(shù)器，每個定時器/計數(shù)器可設置計數(shù)用來計數(shù)外部事件，可以設置成常用的定時方式，并可以根據(jù)計算或結(jié)果控制單片機的運行。（6）五個中斷源控制系統(tǒng)。（7）1個雙向串行I/O口的UART（通用異步接收器/發(fā)送器UART），用于實現(xiàn)單片機的串行通信。（8）振蕩器和時鐘產(chǎn)生電路，需要外部電源的石英晶體微調(diào)電路，允許接在12v的振蕩頻率上。上述部分通過內(nèi)部數(shù)據(jù)總線連接。其中，CPU是單片機的核心，它是單片機的控制和指揮中心，ALU算數(shù)邏輯運算單元可進行算術運算和邏輯運算，由1個8暫時存儲器，和2個8位的累加器組成。Acc累加器是ALU運算結(jié)果的存放單元，一般數(shù)據(jù)通過它來傳送。此外，Acc往往被視為對8051內(nèi)的數(shù)據(jù)傳輸中轉(zhuǎn)站。和通常的微處理器一樣，它是最繁忙的寄存器。有記憶功能并執(zhí)行命令。該控制器包括程序計數(shù)器，可讀寫的存儲器，振蕩器和定時電路等。該程序計數(shù)器是有兩對8或16位計數(shù)器，它是一個字節(jié)地址計數(shù)器，在個人電腦運行程序時，執(zhí)行下一個單元的內(nèi)容，程序執(zhí)行時可以改變它的內(nèi)容從而改變運行的結(jié)果。在8051芯片震蕩電路中，需要外接石英晶體和微調(diào)電容，其頻率范圍為1.2MHz—12MHz。該脈沖信號，即為8051的工作周期，是最小的時間單位。8051和其他單片機一樣，都有相同的控制和功能,就像樂隊也有打擊樂器一樣。在8051中有ROM（程序存儲器，只能讀取），和RAM（數(shù)據(jù)存儲器，可以讀和寫），他們有各自獨立的內(nèi)存地址空間，也有相同的處理方式。8051和8751的程序存儲器