基于Spartan-6 FPGA的SP605開發(fā)板解決文案

基于Spartan-6FPGA的SP605開發(fā)板解決文案Xilinx公司的Spartan-6FPGA是目標(biāo)設(shè)計(jì)平臺(tái),提供集成的軟件和硬件,有利于設(shè)計(jì)集中力量進(jìn)行新產(chǎn)品創(chuàng)新.Spartan-6FPGA包括LX和LXT等13個(gè)系列,邏輯單元從3,840到147,443,而功耗比以前的Spartan降低一半.Spartan-6采用45nm低功耗銅工藝,提供最佳的成本,功耗和性能之間的平衡,1.2V內(nèi)核,3.3V到1.2VI/O標(biāo)準(zhǔn),支持DDR,DDR2,DDR3和LPDDR存儲(chǔ)器,數(shù)據(jù)速率高達(dá)800Mbps(峰值帶寬12.8Gbps),可用在汽車娛樂系統(tǒng),高清視頻平板顯示器系統(tǒng)以及網(wǎng)絡(luò)通信的監(jiān)視圖像捕捉和分析引擎系統(tǒng).本文介紹了Spartan-6FPGA主要特性,目標(biāo)應(yīng)用框圖,以及Spartan-6FPGASP605評(píng)估板主要特性,方框圖以及詳細(xì)電路圖.

TheSpartan?-6familyprovidesleadingsystemintegrationcapabilitieswiththelowesttotalcostforhigh-volumeapplications.Thethirteen-memberfamilydeliversexpandeddensitiesrangingfrom3,840to147,443logiccells,withhalfthepowerconsumptionofpreviousSpartanfamilies,andfaster,morecomprehensiveconnectivity.Builtonamature45nmlow-powercopperprocesstechnologythatdeliverstheoptimalbalanceofcost,power,andperformance,theSpartan-6familyoffersanew,moreefficient,dual-register6-inputlookuptable(LUT)logicandarichselectionofbuilt-insystem-levelblocks.Theseinclude18Kb(2x9Kb)blockRAMs,secondgenerationDSP48A1slices,SDRAMmemorycontrollers,enhancedmixed-modeclockmanagementblocks,SelectIO?technology,poweroptimizedhigh-speedserialtransceiverblocks,PCIExpress?compatibleEndpointblocks,advancedsystem-levelpowermanagementmodes,auto-detectconfigurationoptions,andenhancedIPsecuritywithAESandDeviceDNAprotection.ThesefeaturesprovidealowcostprogrammablealternativetocustomASICproductswithunprecedentedeaseofuse.Spartan-6FPGAsofferthebestsolutionforhigh-volumelogicdesigns,consumer-orientedDSPdesigns,andcost-sensitiveembeddedapplications.Spartan-6FPGAsaretheprogrammablesiliconfoundationforTargetedDesignPlatformsthatdeliverintegratedsoftwareandhardwarecomponentsthatenabledesignerstofocusoninnovationassoonastheirdevelopmentcyclebegins.

Spartan-6FPGA主要特性:

?Spartan-6Family:

?Spartan-6LXFPGA:Logicoptimized

?Spartan-6LXTFPGA:High-speedserialconnectivity

?Designedforlowcost

?Multipleefficientintegratedblocks

?OptimizedselectionofI/Ostandards

?Staggeredpads

?High-volumeplasticwire-bondedpackages

?Lowstaticanddynamicpower

?45nmprocessoptimizedforcostandlowpower

?Hibernatepower-downmodeforzeropower

?Suspendmodemaintainsstateandconfigurationwithmulti-pinwake-up,controlenhancement

?Lower-power1.0Vcorevoltage(LXFPGAs,-1Lonly)

?Highperformance1.2Vcorevoltage(LXandLXTFPGAs,-2,-3,and-4speedgrades)

?Multi-voltage,multi-standardSelectIO?interfacebanks

?Upto1,050Mb/sdatatransferrateperdifferentialI/O

?Selectableoutputdrive,upto24mAperpin

?3.3Vto1.2VI/Ostandardsandprotocols

?Low-costHSTLandSSTLmemoryinterfaces

?Hotswapcompliance

?AdjustableI/Oslewratestoimprovesignalintegrity

?High-speedGTPserialtransceiversintheLXTFPGAs

?Upto3.125Gb/s

?High-speedinterfacesincluding:SerialATA,Aurora,1GEthernet,PCIExpress,OBSAI,CPRI,EPON,GPON,DisplayPort,andXAUI

?IntegratedEndpointblockforPCIExpressdesigns(LXT)

?Low-costPCI?technologysupportcompatiblewiththe33MHz,32-and64-bitspecification.

?EfficientDSP48A1slices

?High-performancearithmeticandsignalprocessing

?Fast18x18multiplierand48-bitaccumulator

?Pipeliningandcascadingcapability

?Pre-addertoassistfilterapplications

?IntegratedMemoryControllerblocks

?DDR,DDR2,DDR3,andLPDDRsupport

?Dataratesupto800Mb/s(12.8Gb/speakbandwidth)

?Multi-portbusstructurewithindependentFIFOtoreducedesigntimingissues

?Abundantlogicresourceswithincreasedlogiccapacity

?OptionalshiftregisterordistributedRAMsupport

?Efficient6-inputLUTsimproveperformanceandminimizepower

?LUTwithdualflip-flopsforpipelinecentricapplications

?BlockRAMwithawiderangeofgranularity

?FastblockRAMwithbytewriteenable

?18Kbblocksthatcanbeoptionallyprogrammedastwoindependent9KbblockRAMs

?ClockManagementTile(CMT)forenhancedperformance

?Lownoise,flexibleclocking

?DigitalClockManagers(DCMs)eliminateclockskewanddutycycledistortion

?Phase-LockedLoops(PLLs)forlow-jitterclocking

?Frequencysynthesiswithsimultaneousmultiplication,division,andphaseshifting

?Sixteenlow-skewglobalclocknetworks

?Simplifiedconfiguration,supportslow-coststandards

?2-pinauto-detectconfiguration

?Broadthird-partySPI(uptox4)andNORflashsupport

?FeaturerichXilinxPlatformFlashwithJTAG

?MultiBootsupportforremoteupgradewithmultiplebitstreams,usingwatchdogprotection

?Enhancedsecurityfordesignprotection

?UniqueDeviceDNAidentifierfordesignauthentication

?AESbitstreamencryptioninthelargerdevices

?Fasterembeddedprocessingwithenhanced,lowcost,MicroBlaze?softprocessor

?Industry-leadingIPandreferencedesigns

Spartan-6FPGA系列特性表:

Spartan?-6FPGA應(yīng)用:

In-CarInfotainmentSystem

Servingasacompaniontothehostprocessor,asingleSpartan-6LX45TFPGAsupportsaudio/videoacceleration,graphicssubsystem,andvehiclenetworkingfunctions.

圖1.汽車娛樂系統(tǒng)

High-ResolutionVideoFlat-PanelDisplaywithDynamicBacklightControlAchievehigherimagequalitywhilereducingpowerandcostusingSpartan-6FPGAswithintegratedserialI/Ocapabilities.

圖2.帶動(dòng)態(tài)背光控制的高清視頻平板顯示器系統(tǒng)

SurveillanceImageCaptureandAnalyticsEngineIntegratesensorinterfacing,videoanalytics,imageenhancementandnetworkinterfacinginasingleSpartan-6LX150TFPGA.

圖3.監(jiān)視圖像捕捉和分析引擎系統(tǒng)

Spartan?-6FPGASP605評(píng)估板

TheSpartan?-6FPGASP605EvaluationKitconvenientlydeliversallthebasiccomponentsfordevelopingbroadcast,wirelesscommunications,automotive,andothercost-andpower-sensitiveapplicationsthatrequiretransceivercapabilitiesinoneackage.Alongwiththeevaluationboard,cables,anddocumentation,theSP605EvaluationKitprovidesanintegrationofhardware,software,intellectualproperty(IP),andpre-verifiedreferencedesignssodevelopmentcanbeginrightoutofthebox.

TheSP605EvaluationKitprovidesaflexibleenvironmentforhigher-levelsystemdesign,includingapplicationsthatimplementfeaturessuchashigh-speedserialtransceivers,PCIExpress?,DVI,and/orDDR3.TheSP605evaluationboardincludesanindustry-standardFPGAMezzanineCard(FMC)connectorforscalingandcustomizingtospecificapplicationsandmarkets.TheintegrationofXilinxdevelopmenttoolshelpstreamlinethecreationofsystemsthatadheretocomplexrequirements.

ThisguideprovidesstepstosetuptheSP605hardwareandrunadiagnosticdemonstrationthatexercisesanumberofbasicboardfeatures.ItintroducesamorecomplexBaseReferenceDesignthatexerciseskeyfeaturesoftheSpartan-6FPGA.ThisguidealsoprovidesstepsforinstallingtheXilinx?ISE?DesignSuite:LogicEditionsoftware,obtainingupdates,andgeneratingalicense.

SP605評(píng)估板包括:

?Spartan-6FPGASP605EvaluationBoard

?ISEDesignSuiteLogicEdition:(device-locked)forSpartan-6LX45TFPGA

?IncludesChipScope?ProsoftwareandtheChipScopeProSerialI/OToolkit

?IncludesPlanAhead?DesignAnalysisTool

?TimingDrivenPlaceandRoute,SmartGuide?,andSmartXplorerTechnology

?Documentation

?HardwareSetupGuide

?GettingStartedGuide

?HardwareUserGuide

?ReferenceDesignUserGuide

?SchematicsandPCBfiles

?Universal12Vpowersupply

?Cables

?(2)USB

?Ethernet

?DVItoVGAadapter

?ReferenceDesignsandDemonstrations

?BoardDiagnosticDemonstration

?BaseReferenceDesignfeaturingDSP48,Ethernet,memory,andserialtransceiverintegration

?MultiBootReferenceDesign,featuringfail-safeconfiguration

?IntegratedMemoryControllerReferenceDesign

?IntegratedBitErrorRatio(IBERT)ReferenceDesign

?PCIe?x1Gen1ReferenceDesign

?Referencedesigns,demonstrations,documentation,andapplicationsdeliveredonUSBFlashdrivetogetstartedquickly

SP605評(píng)估板主要特性:

Spartan-6FPGA

?XC6SLX45T-3FGG484device

Configuration

?OnboardJTAGconfigurationcircuitry

?8MBQuadSPIFlash

?32MBParallel(BPI)Flash

?SystemACECF2GBCompactFlash(CF)cardMemory

?128MBDDR3ComponentMemory

?32MBParallel(BPI)Flash(Alsoavailableforconfiguration)

?8KbIICEEPROM

?128MBQu