經(jīng)濟(jì)管理 信管 畢業(yè)設(shè)計(jì)-局域網(wǎng)交換機(jī)體系結(jié)構(gòu)

PAGE畢業(yè)設(shè)計(jì)（論文）外文翻譯論文題目：局域網(wǎng)交換機(jī)體系結(jié)構(gòu)系部名稱：經(jīng)濟(jì)管理系專業(yè)班級(jí)：信管053班2009年3月16日本章將介紹所有交換機(jī)生產(chǎn)廠商都遵守的局域網(wǎng)交換技術(shù)的一些基本概念。本章首先介紹交換機(jī)如何接受數(shù)據(jù)。隨后，本章介紹保證高效數(shù)據(jù)交換的一些機(jī)制。最后，本章介紹如何將數(shù)據(jù)轉(zhuǎn)發(fā)給目標(biāo)。這些概念并非Cisco交換機(jī)所特有的，而是在查看局域網(wǎng)交換機(jī)功能的時(shí)候，對所有交換機(jī)產(chǎn)品都適用的。1.數(shù)據(jù)接收交換模式在局域網(wǎng)交換中，根據(jù)交換機(jī)功能的不同，第一步就是從發(fā)送設(shè)備或主機(jī)接收幀或分組。對于僅在OSI模型的第2層進(jìn)行轉(zhuǎn)發(fā)決策的交換機(jī)，它們將數(shù)據(jù)看作幀。而對于在OSI模型的第3層或者更高層進(jìn)行轉(zhuǎn)發(fā)決策的交換機(jī)，它們將數(shù)據(jù)看作分組。本章首先從第2層的角度來研究交換機(jī)。根據(jù)具體型號(hào)的不同，交換機(jī)在數(shù)據(jù)交換之前所存儲(chǔ)和檢查的楨數(shù)目也存在一定差異。Catalyst交換機(jī)攴持下述三種交換模式:·直通模式；·碎片隔離模式；·存儲(chǔ)轉(zhuǎn)發(fā)模式。上述3種交換模式的區(qū)別在于交換機(jī)在制定轉(zhuǎn)發(fā)決策之前所接收和檢查的幀數(shù)目。下面將詳細(xì)討論每種交換模式。1.1直通模式如果交換機(jī)工作在直通模式，那么它將只接收和檢查幀的的前6個(gè)字節(jié)。這6個(gè)字節(jié)代表了幀的日標(biāo)MAC地址,交換機(jī)利用這些信息足以做出轉(zhuǎn)發(fā)決策。盡管直通交換能夠在數(shù)據(jù)傳送的時(shí)候提供最低的延遲,但卻容易傳送以太網(wǎng)碰撞所產(chǎn)生的碎片、殘幀(runt)或受損幀。1.2碎片隔離模式如呆交換機(jī)工作在碎片隔離模式,那么它將接收和檢查全幀的前64個(gè)字節(jié)。在某些CiscoCatalyst交換機(jī)的文檔中,碎片隔離又稱為“快速轉(zhuǎn)發(fā)”模式。為什么交換機(jī)檢查幀的前64個(gè)字節(jié)呢?因?yàn)樵谠O(shè)計(jì)良好的以太網(wǎng)網(wǎng)絡(luò)中,碰撞碎片必須在前64字節(jié)中檢測出來。1.3存儲(chǔ)轉(zhuǎn)發(fā)模式如果交換機(jī)工作在存儲(chǔ)轉(zhuǎn)發(fā)模式,那么它將接收和檢查整幀,因此它是錯(cuò)誤率最低的交換模式。由于采用速度更快的處理器和ASIC（Application-SpecificIntegratedCircuit，專用集成電路），交換機(jī)不必支持直通交換機(jī)和碎片隔離交換，因此，所有新型的CiscoCatalyst交換機(jī)都采用存儲(chǔ)轉(zhuǎn)發(fā)交換。圖2-1比較各種交換模式之間的區(qū)別。圖2-1交換模式2.數(shù)據(jù)交換無論交換機(jī)需要檢查幀的多少字節(jié)，幀最終都將由輸入或入站端口交換到單個(gè)或多個(gè)輸出和出站端口。交換矩陣(switchfabric)是交換機(jī)通信信道的一個(gè)常用術(shù)語,它可以在交換機(jī)內(nèi)部傳送幀、承載轉(zhuǎn)發(fā)決策信慮、和轉(zhuǎn)送管理信息。Catalyst交換機(jī)中的交換矩陣可以看作汽車中的傳動(dòng)裝置，在汽車中,傳動(dòng)裝置負(fù)責(zé)將引擎的動(dòng)力傳遞給汽車輪子；在Catalyst交換機(jī)中，交換矩陣負(fù)責(zé)將輸入或入站端口的幀轉(zhuǎn)送給單個(gè)或多個(gè)輸出和出站端口。無論具體型號(hào)如何，也無論何時(shí)產(chǎn)生新的交換平臺(tái),所有文檔都會(huì)將“傳動(dòng)裝置”作為交換矩陣。盡管CiscoCatalyst平臺(tái)已經(jīng)采用多種技術(shù)來實(shí)現(xiàn)交換矩陣，但以下兩種體系結(jié)構(gòu)的交換矩陣最為常見：·共享總線；·交叉矩陣。2.1共享總線交換在共享總線的體系結(jié)構(gòu)中，交換機(jī)的所有線路模塊都共享1個(gè)數(shù)據(jù)通路。中央仲裁器決定何時(shí)授予各線路卡訪問總線的請求。根據(jù)交換機(jī)配置的情況，仲裁器能夠使用多種公平方法。共享總線體系結(jié)構(gòu)非常類似于機(jī)場票務(wù)柜臺(tái)前的多個(gè)隊(duì)列，但任何時(shí)候僅有1個(gè)票務(wù)代理處理客戶請求。圖2-2舉例說明幀進(jìn)入交換機(jī)時(shí)的循環(huán)服務(wù)過程。如果希望根據(jù)幀的接收順序進(jìn)行服務(wù)，那么循環(huán)是最簡單的方法。為了能夠給特定通信流量提供優(yōu)先級(jí)服務(wù)，當(dāng)前的Catalyst交換平臺(tái)（例如Catalyst6500）能夠支持各種各樣的QoS（QuanlityOfService，服務(wù)質(zhì)量）特性。圖2-2循環(huán)服務(wù)順序圖2-3說明了共享總線體系結(jié)構(gòu)中將接收端口或入口處的幀移動(dòng)到發(fā)送端口或出口的基本原理,其中各步驟說明如下。1.接收源自主機(jī)1的幀交換機(jī)的入站端口接受源自主機(jī)1的整幀，并且將其存儲(chǔ)到接受緩沖區(qū)中。端口根據(jù)幀的FCS（FrameCheckSequence，幀檢驗(yàn)序列）進(jìn)行錯(cuò)誤檢測。如果幀存在缺陷（例如殘幀、碎片、無效CRC或者巨型幀），那么端口將丟棄該幀，并且將增加相關(guān)計(jì)數(shù)器的數(shù)值。2.請求訪問數(shù)據(jù)總線包含轉(zhuǎn)發(fā)決策所需要的信息報(bào)頭將被添加到幀中，然后線路卡請求在數(shù)據(jù)總線上發(fā)送幀的訪問權(quán)限或者許可權(quán)限。圖2-3共享總線中的幀流3.將幀發(fā)送到數(shù)據(jù)總線在中央仲裁器授予訪問權(quán)限之后,幀將被發(fā)送到數(shù)據(jù)總線上。4.所有端口接收到幀在共享總線體系結(jié)構(gòu)中，所有端口都將同時(shí)接收每個(gè)發(fā)送幀。此外，負(fù)責(zé)轉(zhuǎn)發(fā)決策的硬件也將接收到幀。5.交換機(jī)決定哪個(gè)端口應(yīng)當(dāng)發(fā)送幀第2步驟中添加到幀中的信息可用于確定哪些端口應(yīng)當(dāng)發(fā)送幀。在某些情況下，對于具有未知目標(biāo)MAC地址的幀或者廣播幀，交換機(jī)將向除幀接收端口之外的所有端口發(fā)送幀。6.端口發(fā)送幀,其余端口丟棄該幀根據(jù)第5步驟中的決策，某個(gè)特定端口或者某些端口被告知發(fā)送幀，而其余端口則被告知丟棄或者清空幀。7.出站端口將幀發(fā)送到主機(jī)2在這個(gè)示例中，假定交換機(jī)知道主機(jī)2的位置，并且僅在連接到主機(jī)2的端口發(fā)送幀。共享總線體系結(jié)構(gòu)的優(yōu)勢之一在于每個(gè)端口（入站端口除外）都將自動(dòng)接收幀的副本，也就易于實(shí)現(xiàn)組播和廣播流量，而無需復(fù)制各個(gè)端口的幀。2.2交叉矩陣交換在共享總線體系結(jié)構(gòu)示例中，共享數(shù)據(jù)總線的速度決定了交換機(jī)的流量處理總?cè)萘?。因?yàn)榭偩€采用共享訪問的方式，所以線路卡必須等待時(shí)機(jī)才能進(jìn)行通信，這嚴(yán)重限制了總帶寬。為了克服共享數(shù)據(jù)總線體系結(jié)構(gòu)所產(chǎn)生的限制，解決方案是采用交叉交換矩陣，如圖2-4所示。對于不同的交換機(jī)平臺(tái)，術(shù)語交叉矩陣意味著不同的內(nèi)容，但基本都指線路卡之間能夠同時(shí)使用多個(gè)數(shù)據(jù)信道或者通路。圖2-4交叉交換矩陣在CiscoCatalyst5500系列（Cisco公司最早采用交叉矩陣體系結(jié)構(gòu)的產(chǎn)品之一）交換機(jī)產(chǎn)品中，總共實(shí)現(xiàn)3條獨(dú)立的1.2Gbit/s數(shù)據(jù)總線，新型的Catalyst5500系列線路卡具有必要的連接器針腳，她們能夠同時(shí)連接到這3條數(shù)據(jù)總線，進(jìn)而能夠充分利用3.6Gbit/s的總帶寬。通過僅連接到3條數(shù)據(jù)總線中的1條數(shù)據(jù)總線，老式的CiscoCatalyst5500系列線路卡仍然能夠兼容CiscoCatalyst5500系列。在CiscoCatalyst5500平臺(tái)中，吉比特以太網(wǎng)線路卡要求訪問所有3條數(shù)據(jù)總線。在CiscoCatalyst6500系列交換機(jī)中，SFM（SwitchFabricModule，交換矩陣模塊）和SFM2（SwitchFabricModule2，交換矩陣模塊2）能夠支持交叉矩陣。通過到交叉交換矩陣的16個(gè)獨(dú)立的8Gbit/s連接，SFM能夠向線路卡提供128Gbit/s的帶寬（256Gbit/s全雙工）。新型SFM2用于支持Catalyst6513（13插槽的機(jī)箱），并且對SFM進(jìn)行了體系結(jié)構(gòu)方面的優(yōu)化。3.數(shù)據(jù)緩沖在共享數(shù)據(jù)體系結(jié)構(gòu)傳送幀之前，幀必須等待中央仲裁器的處理安排。此外，交叉交換矩陣發(fā)生擁塞，也可能會(huì)延遲幀的處理?；谏鲜鲈?，在傳送幀之前，必須對其進(jìn)行緩沖處理。如果沒有有效的緩沖機(jī)制，那么當(dāng)出現(xiàn)流景過量或發(fā)牛擁塞的時(shí)候,幀被丟棄的可能性就非常高。如果發(fā)往端口的流量超過了它所能發(fā)送的流量,那么就需要使用緩沖。出現(xiàn)下述情況的時(shí)候，就需要使用緩沖：·入口和出站端口的速度不匹配；·多個(gè)輸入端口共同向單個(gè)輸出端口提供流景；·輸出端口發(fā)生半雙工碰撞；·上述幾種情況的組合。為了防止丟棄幀,Catalyst交換機(jī)通常采用下述兩種內(nèi)存管理方式：·端口緩沖內(nèi)存；·共享內(nèi)存。3.1端口緩沖內(nèi)存通過采用端口緩沖內(nèi)存，交換機(jī)(例如Catalyst5500)能夠?yàn)槊總€(gè)以太網(wǎng)端口提供一定數(shù)量的高速內(nèi)存，這些內(nèi)存可用于幀發(fā)送之前的幀緩沖。端口緩沖內(nèi)存的不足之處，在于如果端口的緩沖已經(jīng)用盡，那么就會(huì)發(fā)生丟棄幀的情況。為了最大限度利用緩沖的優(yōu)勢，方法之一是采用靈活的緩沖區(qū)尺寸。Catalyst5500以太網(wǎng)線路卡端口的緩沖內(nèi)存就是非常靈活的，并且能夠創(chuàng)建各種尺寸的幀緩沖區(qū)，進(jìn)而充分利用可用的緩沖區(qū)內(nèi)存。對于采用SAINTASIC的Catalyst5000以太網(wǎng)卡，每個(gè)端口包含192KB的緩沖區(qū)內(nèi)存，其中24KB用于接收或者輸入緩沖區(qū)，而168KB用于發(fā)送或者輸出緩沖區(qū)。通過使用168KB的發(fā)送緩沖區(qū)，每個(gè)端口最多能夠創(chuàng)建2500個(gè)64字節(jié)的緩沖區(qū)。因?yàn)榇蠖鄶?shù)緩沖區(qū)都用語輸出隊(duì)列，所以Catalyst5000家族交換機(jī)已經(jīng)減輕線端阻塞的問題。圖2-5舉例說明端口緩沖內(nèi)存的情況。3.2共享內(nèi)存在最早的Cisco交換機(jī)產(chǎn)品中，某些產(chǎn)品使用共享內(nèi)存設(shè)計(jì)進(jìn)行端口緩沖。對于采用共享內(nèi)存體系結(jié)構(gòu)的交換機(jī)，所有端口能夠同時(shí)以共享幀或者分組緩沖區(qū)的形式訪問內(nèi)存。所有的入口幀都被存儲(chǔ)到共享內(nèi)存“池”中，并且一直保存到出站端口準(zhǔn)備發(fā)送幀為止。交換機(jī)以緩沖區(qū)的形式動(dòng)態(tài)地分配共享內(nèi)存，為接收大量入口流量的端口分配足夠的緩沖區(qū)，并且不會(huì)為空閑端口分配不必要的緩沖區(qū)。圖2-5端口緩沖內(nèi)存Catalyst1200系列交換機(jī)是一款早期的共享內(nèi)存交換機(jī)產(chǎn)品。Catalyst1200能夠支持以太網(wǎng)和FDDI，并且具有4MB的共享分組DRAM（DynamicRandom-AccessMemory，動(dòng)態(tài)隨機(jī)訪問內(nèi)存）。分組采用FIFO（firstin，firstout，先入先出）的處理方式。在采用共享內(nèi)存體系結(jié)構(gòu)的交換機(jī)中，Catalyst4000和Catalyst4500系列交換機(jī)是比較新的一些產(chǎn)品。對于采用Supervisor1的Catalyst4000系列，它采用8MB的SRAM（StaticRandom-AccessMemory，靜態(tài)隨機(jī)訪問內(nèi)存）作為動(dòng)態(tài)幀緩沖區(qū)。中央處理器或者ASIC負(fù)責(zé)幀交換，并且在交換之前將把幀存儲(chǔ)到分組緩沖區(qū)內(nèi)。Catalyst4500SupervisorIV采用16MB的SRAM用于分組緩沖區(qū)。共享內(nèi)存緩沖區(qū)尺寸可能取決于平臺(tái)，但大多數(shù)情況下在64字節(jié)到256字節(jié)的范圍內(nèi)進(jìn)行分配。圖2-6舉例說明輸入幀在被交換引擎交換之前如何存儲(chǔ)到共享內(nèi)存（以64字節(jié)為單位）中。4.過度預(yù)定交換矩陣交換機(jī)制造商喜歡使用術(shù)語無阻塞米表明連接到交換矩陣的交換端口能夠達(dá)到線速。例如，對于8端口吉比特以太網(wǎng)模塊，為了似的端口能夠達(dá)到無阻塞的狀態(tài)，那么就要求交換矩陣必須支持8Gbit/s的帶寬。除最高端交換平臺(tái)和配置之外，所有交換產(chǎn)品都可能發(fā)生過度預(yù)定交換矩陣的情況。根據(jù)應(yīng)用情況的不同，過度預(yù)定的端口可能存在問題，也可能不存在問題。例如，對于48端口的10/100/1000吉比特以太網(wǎng)模塊，如果所有端口都工作在1Gbit/s，那么就需要交換矩陣支持48Gbit/s的帶寬。如果大部分或者全部端口都連接到高速文件服務(wù)器，而這些文件服務(wù)器會(huì)產(chǎn)生穩(wěn)定的通信流，那么單個(gè)線路模塊就會(huì)超過整個(gè)交換矩陣的帶寬。如果所有模塊都連接到帶寬要求不高的終端用戶工作站，即使某個(gè)線路卡過度預(yù)定交換矩陣，那么也不會(huì)顯著影響性能。圖2-6共享內(nèi)存體系結(jié)構(gòu)根據(jù)具體的帶寬需求情況，Cisco在各種平臺(tái)上提供了無阻塞和阻塞等兩種配置。為了確定交換矩陣的總連接帶寬，請查看各種平臺(tái)和線路卡的技術(shù)指標(biāo)。5.擁塞和線端阻塞對于等待傳送的流量，如呆它們阻礙或者阻塞了去往其他目標(biāo)的流量被傳送，那么就發(fā)生線端阻寨。線端阻塞大多發(fā)生在多個(gè)高速數(shù)據(jù)源向相同目標(biāo)發(fā)送流量灼的情況。在早期的共享總線環(huán)境中，中央仲裁器采用循環(huán)服務(wù)的方法在不同的線路卡之間移動(dòng)流量。每個(gè)線路卡上的端口通過本地仲裁器來請求發(fā)送流量。為了獲得交換總線的訪問，每個(gè)線路卡的本地仲裁器都必須等待中央仲裁器的分配次序。一旦發(fā)送線路卡獲得訪問權(quán)限,在能夠?yàn)榫€路中的下一個(gè)請求提供服務(wù)之前，中央仲裁器不得不等待接收線路卡完整地接收幀。這種情況與在銀行中進(jìn)行巾進(jìn)行存款的情形存在一定的相似性：l名出納員向多個(gè)客戶提供服務(wù)，但接收服務(wù)的客戶正在辦理復(fù)雜的業(yè)務(wù)，那么其他客戶就必須等待。如圖2-7所示，流量發(fā)生器能夠產(chǎn)生擁塞現(xiàn)象。流量發(fā)生器的端口1連接到交換機(jī)的端口1，并且向交換機(jī)的端口3和端口4發(fā)送50%速率的流量。流量發(fā)生器的端口2連接到交換機(jī)的端口2，并且向交換機(jī)的端口4發(fā)送100%速率的流量。因?yàn)榻粨Q機(jī)需要發(fā)送流量為端口轉(zhuǎn)發(fā)能力的150%，所以交換端口4所轉(zhuǎn)發(fā)的流量就會(huì)產(chǎn)生擁塞。如果沒有適當(dāng)?shù)木彌_和轉(zhuǎn)發(fā)算法，那么交換端口3所轉(zhuǎn)發(fā)的流量就將等待，并且一直等到端口4的擁塞消除為止。圖2-7線端阻塞在使用交叉交換矩陣的情況下，因?yàn)楹芏嗑€路卡都和交換矩陣之間具有高速連接，所以也可能發(fā)生線端阻塞。對于已經(jīng)處于繁忙狀態(tài)的線路卡，如果多個(gè)線路卡試圖與其建立連接，那么它們就必須等待接收線路卡處于空閑狀態(tài)。在這種情況下，發(fā)往其他非忙狀態(tài)線路卡的數(shù)據(jù)將會(huì)被線端的幀所阻塞。Catalyst交換機(jī)采用多種技術(shù)來避免線端阻塞，例如采用每端口緩沖。每個(gè)端口都維護(hù)1個(gè)小的入口緩沖區(qū)和1個(gè)大的出口緩沖區(qū)。在發(fā)生擁塞期間，大的輸出緩沖區(qū)（64KB到512KB共享內(nèi)存）允許對準(zhǔn)備發(fā)送的幀進(jìn)行排隊(duì)。在正常工作的情況下，因?yàn)榻粨Q總線能夠以非常高的速度為幀提供服務(wù)，所以只需要小的輸入隊(duì)列。除了能夠在擁塞期間進(jìn)行排隊(duì)，很多型號(hào)的Catalyst交換機(jī)都能夠?qū)指舻讲煌妮斎牒洼敵鲫?duì)列中，進(jìn)而可以為某些敏感流量（例如語音）提供更高優(yōu)先級(jí)的待遇或者優(yōu)先級(jí)排隊(duì)。6.數(shù)據(jù)轉(zhuǎn)發(fā)無論交換矩陣類型如何，交換機(jī)都必須決定哪些端口轉(zhuǎn)發(fā)幀和哪些端口應(yīng)當(dāng)清空或者丟棄幀。決策的參考依據(jù)可以是第2層信息（源/目標(biāo)MAC地址）或其他一些信息（例如第3層IP信息和第4層端口信息）。每種交換平臺(tái)都支持各種類型負(fù)責(zé)智能交換決策的ASIC。每臺(tái)Catalyst交換機(jī)都會(huì)為每個(gè)分組創(chuàng)建報(bào)頭或者標(biāo)簽，并且以該報(bào)頭或者標(biāo)簽作為轉(zhuǎn)發(fā)決策的基礎(chǔ)。7．總結(jié)在優(yōu)化數(shù)據(jù)交換方面，盡管存在多種不同的方法，但它們的核心概念卻是緊密相關(guān)的。為了獲得高速交換的解決方案，根據(jù)具體平臺(tái)的不同，CiscoCatalyst交換機(jī)產(chǎn)品線注重使用共享總線、交叉交換矩陣和兩種技術(shù)的結(jié)合。為了降低阻塞和避免線端阻塞，高速交換ASIC使用了共享和每端口緩沖區(qū)技術(shù)。本文摘自CiscoLANSwitchingFundamentals，DavidBarns,BasirSakandar[著]LANSwitchArchitectureThischapterintroducesmanyoftheconceptsbehindLANswitchingcommontoallswitchvendors.Thechapterbeginsbylookingathowdataarereceivedbyaswitch,followedbymechanismsusedtoswitchdataasefficientlyaspossible,andconcludeswithforwardingdatatowardtheirdestinations.TheseconceptsarenotspecifictoCiscoandarevalidwhenexaminingthecapabilitiesofanyLANswitch.1.ReceivingData—SwitchingModesThefirststepinLANswitchingisreceivingtheframeorpacket,dependingonthecapabilitiesoftheswitch,fromthetransmittingdeviceorhost.SwitchesmakingforwardingdecisionsonlyatLayer2oftheOSImodelrefertodataasframes,whileswitchesmakingforwardingdecisionsatLayer3andaboverefertodataaspackets.Thischapter'sexaminationofswitchingbeginsfromaLayer2pointofview.Dependingonthemodel,varyingamountsofeachframearestoredandexaminedbeforebeingswitched.ThreetypesofswitchingmodeshavebeensupportedonCatalystswitches:·Cutthrough·Fragmentfree·StoreandforwardThesethreeswitchingmodesdifferinhowmuchoftheframeisreceivedandexaminedbytheswitchbeforeaforwardingdecisionismade.Thenextsectionsdescribeeachmodeindetail.1.1Cut-ThroughModeSwitchesoperatingincut-throughmodereceiveandexamineonlythefirst6bytesofaframe.Thesefirst6bytesrepresentthedestinationMACaddressoftheframe,whichissufficientinformationtomakeaforwardingdecision.Althoughcut-throughswitchingofferstheleastlatencywhentransmittingframes,itissusceptibletotransmittingfragmentscreatedviaEthernetcollisions,runts(frameslessthan64bytes),ordamagedframes.1.2Fragment-FreeModeSwitchesoperatinginfragment-freemodereceiveandexaminethefirst64bytesofframe.Fragmentfreeisreferredtoas"fastforward"modeinsomeCiscoCatalystdocumentation.Whyexamine64bytes?InaproperlydesignedEthernetnetwork,collisionfragmentsmustbedetectedinthefirst64bytes.1.3Store-and-ForwardModeSwitchesoperatinginstore-and-forwardmodereceiveandexaminetheentireframe,resultinginthemosterror-freetypeofswitching.Asswitchesutilizingfasterprocessorandapplication-specificintegratedcircuits(ASICs)wereintroduced,theneedtosupportcut-throughandfragment-freeswitchingwasnolongernecessary.Asaresult,allnewCiscoCatalystswitchesutilizestore-and-forwardswitching.Figure2-1compareseachoftheswitchingmodes.Figure2-1.SwitchingModes2.SwitchingDataRegardlessofhowmanybytesofeachframeareexaminedbytheswitch,theframemusteventuallybeswitchedfromtheinputoringressporttooneormoreoutputoregressports.Aswitchfabricisageneraltermforthecommunicationchannelsusedbytheswitchtotransportframes,carryforwardingdecisioninformation,andrelaymanagementinformationthroughouttheswitch.AcomparisoncouldbemadebetweentheswitchingfabricinaCatalystswitchandatransmissiononanautomobile.Inanautomobile,thetransmissionisresponsibleforrelayingpowerfromtheenginetothewheelsofthecar.InaCatalystswitch,theswitchfabricisresponsibleforrelayingframesfromaninputoringressporttooneormoreoutputoregressports.Regardlessofmodel,wheneveranewswitchingplatformisintroduced,thedocumentationwillgenerallyrefertothe"transmission"astheswitchingfabric.AlthoughavarietyoftechniqueshavebeenusedtoimplementswitchingfabricsonCiscoCatalystplatforms,twomajorarchitecturesofswitchfabricsarecommon:·Sharedbus·Crossbar2.1SharedBusSwitchingInasharedbusarchitecture,alllinemodulesintheswitchshareonedatapath.Acentralarbiterdetermineshowandwhentograntrequestsforaccesstothebusfromeachlinecard.Variousmethodsofachievingfairnesscanbeusedbythearbiterdependingontheconfigurationoftheswitch.Asharedbusarchitectureismuchlikemultiplelinesatanairportticketcounter,withonlyoneticketingagentprocessingcustomersatanygiventime.Figure2-2illustratesaround-robinservicingofframesastheyenteraswitch.Round-robinisthesimplestmethodofservicingframesintheorderinwhichtheyarereceived.CurrentCatalystswitchingplatformssuchastheCatalyst6500supportavarietyofqualityofservice(QoS)featurestoprovidepriorityservicetospecifiedtrafficflows.Figure2-2.Round-RobinServiceOrderThefollowinglistandFigure2-3illustratethebasicconceptofmovingframesfromthereceivedportoringress,tothetransmitport(s)oregressusingasharedbusarchitecture:FramereceivedfromHost1—TheingressportontheswitchreceivestheentireframefromHost1andstoresitinareceivebuffer.Theportcheckstheframe'sFrameCheckSequence(FCS)forerrors.Iftheframeisdefective(runt,fragment,invalidCRC,orGiant),theportdiscardstheframeandincrementstheappropriatecounter.Requestingaccesstothedatabus—Aheadercontaininginformationnecessarytomakeaforwardingdecisionisaddedtotheframe.Thelinecardthenrequestsaccessorpermissiontotransmittheframeontothedatabus.Frametransmittedontothedatabus—Afterthecentralarbitergrantsaccess,theframeistransmittedontothedatabus.Frameisreceivedbyallports—Inasharedbusarchitecture,everyframetransmittedisreceivedbyallportssimultaneously.Inaddition,theframeisreceivedbythehardwarenecessarytomakeaforwardingdecision.Switchdetermineswhichport(s)shouldtransmittheframe—Theinformationaddedtotheframeinstep2isusedtodeterminewhichportsshouldtransmittheframe.Insomecases,frameswitheitheranunknowndestinationMACaddressorabroadcastframe,theswitchwilltransmittheframeoutallportsexcepttheoneonwhichtheframewasreceived.Port(s)instructedtotransmit,remainingportsdiscardtheframe—Basedonthedecisioninstep5,acertainportorportsistoldtotransmittheframewhiletherestaretoldtodiscardorflushtheframe.EgressporttransmitstheframetoHost2—Inthisexample,itisassumedthatthelocationofHost2isknowntotheswitchandonlytheportconnectingtoHost2transmitstheframe.Oneadvantageofasharedbusarchitectureiseveryportexcepttheingressportreceivesacopyoftheframeautomatically,easilyenablingmulticastandbroadcasttrafficwithouttheneedtoreplicatetheframesforeachport.ThisexampleisgreatlysimplifiedandwillbediscussedindetailforCatalystplatformsthatutilizeasharedbusarchitectureinChapter3,"CatalystSwitchingArchitecture."Figure2-3.FrameFlowinaSharedBus2.2CrossbarSwitchingInthesharedbusarchitectureexample,thespeedoftheshareddatabusdeterminesmuchoftheoveralltraffichandlingcapacityoftheswitch.Becausethebusisshared,linecardsmustwaittheirturnstocommunicate,andthislimitsoverallbandwidth.Asolutiontothelimitationsimposedbythesharedbusarchitectureistheimplementationofacrossbarswitchfabric,asshowninFigure2-4.Thetermcrossbarmeansdifferentthingsondifferentswitchplatforms,butessentiallyindicatesmultipledatachannelsorpathsbetweenlinecardsthatcanbeusedsimultaneously.InthecaseoftheCiscoCatalyst5500series,oneofthefirstcrossbararchitecturesadvertisedbyCisco,threeindividual1.2-Gbpsdatabusesareimplemented.NewerCatalyst5500serieslinecardshavethenecessaryconnectorpinstoconnecttoallthreebusessimultaneously,takingadvantageof3.6Gbpsofaggregatebandwidth.LegacylinecardsfromtheCatalyst5000arestillcompatiblewiththeCatalyst5500seriesbyconnectingtoonlyoneofthethreedatabuses.AccesstoallthreebusesisrequiredbyGigabitEthernetcardsontheCatalyst5500platform.AcrossbarfabricontheCatalyst6500seriesisenabledwiththeSwitchFabricModule(SFM)andSwitchFabricModule2(SFM2).TheSFMprovides128Gbpsofbandwidth(256Gbpsfullduplex)tolinecardsvia16individual8-Gbpsconnectionstothecrossbarswitchfabric.TheSFM2wasintroducedtosupporttheCatalyst651313-slotchassisandincludesarchitectureoptimizationsovertheSFM.Figure2-4.CrossbarSwitchFabric3.BufferingDataFramesmustwaittheirturnforthecentralarbiterbeforebeingtransmittedinsharedbusarchitectures.Framescanalsopotentiallybedelayedwhencongestionoccursinacrossbarswitchfabric.Asaresult,framesmustbebuffereduntiltransmitted.Withoutaneffectivebufferingscheme,framesaremorelikelytobedroppedanytimetrafficoversubscriptionorcongestionoccurs.Buffersgetusedwhenmoretrafficisforwardedtoaportthanitcantransmit.Reasonsforthisincludethefollowing:SpeedmismatchbetweeningressandegressportsMultipleinputportsfeedingasingleoutputportHalf-duplexcollisionsonanoutputportAcombinationofalltheaboveTopreventframesfrombeingdropped,twocommontypesofmemorymanagementareusedwithCatalystswitches:PortbufferedmemorySharedmemory3.1PortBufferedMemorySwitchesutilizingportbufferedmemory,suchastheCatalyst5000,provideeachEthernetportwithacertainamountofhigh-speedmemorytobufferframesuntiltransmitted.Adisadvantageofportbufferedmemoryisthedroppingofframeswhenaportrunsoutofbuffers.Onemethodofmaximizingthebenefitsofbuffersistheuseofflexiblebuffersizes.Catalyst5000Ethernetlinecardportbuffermemoryisflexibleandcancreateframebuffersforanyframesize,makingthemostoftheavailablebuffermemory.Catalyst5000EthernetcardsthatusetheSAINTASICcontain192KBofbuffermemoryperport,24kbpsforreceiveorinputbuffers,and168KBfortransmitoroutputbuffers.Usingthe168KBoftransmitbuffers,eachportcancreateasmanyas250064-bytebuffers.Withmostofthebuffersinuseasanoutputqueue,theCatalyst5000familyhaseliminatedhead-of-lineblockingissues.(Youlearnmoreabouthead-of-lineblockinglaterinthischapterinthesection"CongestionandHead-of-LineBlocking.")Innormaloperations,theinputqueueisneverusedformorethanoneframe,becausetheswitchingbusrunsatahighspeed.Figure2-5illustratesportbufferedmemory.Figure2-5.PortBufferedMemory3.2SharedMemorySomeoftheearliestCiscoswitchesuseasharedmemorydesignforportbuffering.Switchesusingasharedmemoryarchitectureprovideallportsaccesstothatmemoryatthesametimeintheformofsharedframeorpacketbuffers.Allingressframesarestoredinasharedmemory"pool"untiltheegressportsarereadytotransmit.Switchesdynamicallyallocatethesharedmemoryintheformofbuffers,accommodatingportswithhighamountsofingresstraffic,withoutallocatingunnecessarybuffersforidleports.TheCatalyst1200seriesswitchisanearlyexampleofasharedmemoryswitch.TheCatalyst1200supportsbothEthernetandFDDIandhas4MBofsharedpacketdynamicrandom-accessmemory(DRAM).Packetsarehandledfirstin,firstout(FIFO).MorerecentexamplesofswitchesusingsharedmemoryarchitecturesaretheCatalyst4000and4500seriesswitches.TheCatalyst4000withaSupervisorIutilizes8MBofStaticRAM(SRAM)asdynamicframebuffers.AllframesareswitchedusingacentralprocessororASICandarestoredinpacketbuffersuntilswitched.TheCatalyst4000SupervisorIcancreateapproximately4000sharedpacketbuffers.TheCatalyst4500SupervisorIV,forexample,utilizes16MBofSRAMforpacketbuffers.Sharedmemorybuffersizesmayvarydependingontheplatform,butaremostoftenallocatedinincrementsrangingfrom64to256bytes.Figure2-6illustrateshowincomingframesarestoredin64-byteincrementsinsharedmemoryuntilswitchedbytheswitchingengine.Figure2-6.SharedMemoryArchitecture4.OversubscribingtheSwitchFabricSwitchmanufacturersusethetermnon-blockingtoindicatethatsomeoralltheswitchedportshaveconnectionstotheswitchfabricequaltotheirlinespeed.Forexample,an8-portGigabitEthernetmodulewouldrequire8Gbofbandwidthintotheswitchfabricfortheportstobeconsiderednon-blocking.Allbutthehighestendswitchingplatformsandconfigurationshavethepotentialofoversubscribingaccesstotheswitchingfabric.Dependingontheapplication,oversubscribingportsmayormaynotbeanissue.Forexample,a10/100/100048-portGigabitEthernetmodulewithallportsrunningat1Gbpswouldrequire48Gbpsofbandwidthintotheswitchfabric.Ifmanyorallportswereconnectedtohigh-speedfileserverscapableofgeneratingconsistentstreamsoftraffic,thisone-linemodulecouldoutstripthebandwidthoftheentireswitchingfabric.Ifthemoduleisconnectedentirelytoend-userworkstationswithlowerbandwidthrequirements,acardthatoversubscribestheswitchfabricmaynotsignificantlyimpactperformance.Ciscooffersbothnon-blockingandblockingconfigurationsonvariousplatforms,dependingonbandwidthrequirements.Checkthespecificationsofeachplatformandtheavailablelinecardstodeterminetheaggregatebandwidthoftheconnectionintotheswitchfabric.5.CongestionandHead-of-LineBlockingHead-of-lineblockingoccurswhenevertrafficwaitingtobetransmittedpreventsorblockstrafficdestinedelsewherefrombeingtransmitted.Head-of-lineblockingoccursmostoftenwhenmultiplehigh-speeddatasourcesaresendingtothesamedestination.Intheearliersharedbusexample,thecentralarbiterusedtheround-robinserviceapproachtomovingtrafficfromonelinecardtoanother.Portsoneachlinecardrequestaccesstotransmitviaalocalarbiter.Inturn,eachlinecard'slocalarbiterwaitsitsturnforthecentralarbitertograntaccesstotheswitchingbus.Onceaccessisgrantedtothetransmittinglinecard,thecentralarbiterhastowaitforthereceivinglinecardtofullyreceivetheframesbeforeservicingthenextrequestinline.Thesituationisnotmuchdifferentthanneedingtomakeasimpledepositatabankhavingonetellerandmanylines,whilethepersonbeinghelpedisconductingacomplextransaction.InFigure2-7,acongestionscenarioiscreatedusingatrafficgenerator.Port1onthetrafficgeneratorisconnectedtoPort1ontheswitch,generatingtrafficata50percentrate,destinedforbothPorts3and4.Port2onthetrafficgeneratorisconnectedtoPort2ontheswitch,generatingtrafficata100percentrate,destinedforonlyPort4.ThissituationcreatescongestionfortrafficdestinedtobeforwardedbyPort4ontheswitchbecausetrafficequalto150percentoftheforwardingcapabilitiesofthatportisbeingsent.Withoutproperbufferingandforwardingalgorithms,trafficdestinedtobetransmittedbyPort3ontheswitchmayhavetowaituntilthecongestiononPort4clears.Figure2-7.Head-of-LineBlockingHead-of-lineb