基于51的CC1101發(fā)送程序

1、我今天才發(fā)現(xiàn)以前傳的那個(gè)接收程序，主函數(shù)后面少了一段函數(shù)，不曉得為什么掉了一段函數(shù)，跟大家說(shuō)聲抱歉!我把接收的函數(shù)的主函數(shù)，附在這個(gè)文檔末尾。這個(gè)文檔的發(fā)送程序跟前面的接收程序是對(duì)應(yīng)的，根據(jù)程序說(shuō)明連接好電路測(cè)試可以通過(guò)的。這個(gè)函數(shù)的功能是按KEY1鍵接收端燈亮，按KEY2鍵接收端燈滅。（51單片機(jī)端口默認(rèn)高電平，接燈的時(shí)候注意下）CC1101/CC1100基于A(yíng)T51/52單片機(jī)的按鍵發(fā)送程序#include <reg52.h>#include <intrins.h>#defineINT8Uunsigned char#defineINT16Uunsigned int#

2、define WRITE_BURST 0x40/連續(xù)寫(xiě)入#define READ_SINGLE 0x80/讀#define READ_BURST 0xC0/連續(xù)讀#define BYTES_IN_RXFIFO 0x7F /接收緩沖區(qū)的有效字節(jié)數(shù)#define CRC_OK 0x80 /CRC校驗(yàn)通過(guò)位標(biāo)志/*sbit GDO0=P21;sbit GDO2=P22;sbitMISO=P23;sbitMOSI=P25;sbitSCK=P24;sbitCSN=P20;/*sbit LED =P00;sbit KEY1 =P02;sbit KEY2 =P03;sbit KEY3 =P01;/sbit

3、KEY1 =P01;/sbit KEY2 =P02;/sbit KEY3 =P03;/*sbitled3=P04;sbitled2=P05;sbitled1=P06;sbitled0=P07;/*/INT8U PaTabel8 = 0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60;/*void SpiInit(void);void CpuInit(void);void RESET_CC1100(void);void POWER_UP_RESET_CC1100(void);void halSpiWriteReg(INT8U addr, INT8U va

4、lue);void halSpiWriteBurstReg(INT8U addr, INT8U *buffer, INT8U count);void halSpiStrobe(INT8U strobe);INT8U halSpiReadReg(INT8U addr);void halSpiReadBurstReg(INT8U addr, INT8U *buffer, INT8U count);INT8U halSpiReadStatus(INT8U addr);void halRfWriteRfSettings(void);void halRfSendPacket(INT8U *txBuffe

5、r, INT8U size); /*/ CC1100 STROBE, CONTROL AND STATUS REGSITER#define CCxxx0_IOCFG2 0x00 / GDO2 output pin configuration#define CCxxx0_IOCFG1 0x01 / GDO1 output pin configuration#define CCxxx0_IOCFG0 0x02 / GDO0 output pin configuration#define CCxxx0_FIFOTHR 0x03 / RX FIFO and TX FIFO thresholds#def

6、ine CCxxx0_SYNC1 0x04 / Sync word, high INT8U#define CCxxx0_SYNC0 0x05 / Sync word, low INT8U#define CCxxx0_PKTLEN 0x06 / Packet length#define CCxxx0_PKTCTRL1 0x07 / Packet automation control#define CCxxx0_PKTCTRL0 0x08 / Packet automation control#define CCxxx0_ADDR 0x09 / Device address#define CCxx

7、x0_CHANNR 0x0A / Channel number#define CCxxx0_FSCTRL1 0x0B / Frequency synthesizer control#define CCxxx0_FSCTRL0 0x0C / Frequency synthesizer control#define CCxxx0_FREQ2 0x0D / Frequency control word, high INT8U#define CCxxx0_FREQ1 0x0E / Frequency control word, middle INT8U#define CCxxx0_FREQ0 0x0F

8、 / Frequency control word, low INT8U#define CCxxx0_MDMCFG4 0x10 / Modem configuration#define CCxxx0_MDMCFG3 0x11 / Modem configuration#define CCxxx0_MDMCFG2 0x12 / Modem configuration#define CCxxx0_MDMCFG1 0x13 / Modem configuration#define CCxxx0_MDMCFG0 0x14 / Modem configuration#define CCxxx0_DEVI

9、ATN 0x15 / Modem deviation setting#define CCxxx0_MCSM2 0x16 / Main Radio Control State Machine configuration#define CCxxx0_MCSM1 0x17 / Main Radio Control State Machine configuration#define CCxxx0_MCSM0 0x18 / Main Radio Control State Machine configuration#define CCxxx0_FOCCFG 0x19 / Frequency Offse

10、t Compensation configuration#define CCxxx0_BSCFG 0x1A / Bit Synchronization configuration#define CCxxx0_AGCCTRL2 0x1B / AGC control#define CCxxx0_AGCCTRL1 0x1C / AGC control#define CCxxx0_AGCCTRL0 0x1D / AGC control#define CCxxx0_WOREVT1 0x1E / High INT8U Event 0 timeout#define CCxxx0_WOREVT0 0x1F /

11、 Low INT8U Event 0 timeout#define CCxxx0_WORCTRL 0x20 / Wake On Radio control#define CCxxx0_FREND1 0x21 / Front end RX configuration#define CCxxx0_FREND0 0x22 / Front end TX configuration#define CCxxx0_FSCAL3 0x23 / Frequency synthesizer calibration#define CCxxx0_FSCAL2 0x24 / Frequency synthesizer

12、calibration#define CCxxx0_FSCAL1 0x25 / Frequency synthesizer calibration#define CCxxx0_FSCAL0 0x26 / Frequency synthesizer calibration#define CCxxx0_RCCTRL1 0x27 / RC oscillator configuration#define CCxxx0_RCCTRL0 0x28 / RC oscillator configuration#define CCxxx0_FSTEST 0x29 / Frequency synthesizer

13、calibration control#define CCxxx0_PTEST 0x2A / Production test#define CCxxx0_AGCTEST 0x2B / AGC test#define CCxxx0_TEST2 0x2C / Various test settings#define CCxxx0_TEST1 0x2D / Various test settings#define CCxxx0_TEST0 0x2E / Various test settings/ Strobe commands#define CCxxx0_SRES 0x30 / Reset chi

14、p.#define CCxxx0_SFSTXON 0x31 / Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1). / If in RX/TX: Go to a wait state where only the synthesizer is / running (for quick RX / TX turnaround).#define CCxxx0_SXOFF 0x32 / Turn off crystal oscillator.#define CCxxx0_SCAL 0x33 / Calibrate fr

15、equency synthesizer and turn it off / (enables quick start).#define CCxxx0_SRX 0x34 / Enable RX. Perform calibration first if coming from IDLE and / MCSM0.FS_AUTOCAL=1.#define CCxxx0_STX 0x35 / In IDLE state: Enable TX. Perform calibration first if / MCSM0.FS_AUTOCAL=1. If in RX state and CCA is ena

16、bled: / Only go to TX if channel is clear.#define CCxxx0_SIDLE 0x36 / Exit RX / TX, turn off frequency synthesizer and exit / Wake-On-Radio mode if applicable.#define CCxxx0_SAFC 0x37 / Perform AFC adjustment of the frequency synthesizer#define CCxxx0_SWOR 0x38 / Start automatic RX polling sequence

17、(Wake-on-Radio)#define CCxxx0_SPWD 0x39 / Enter power down mode when CSn goes high.#define CCxxx0_SFRX 0x3A / Flush the RX FIFO buffer.#define CCxxx0_SFTX 0x3B / Flush the TX FIFO buffer.#define CCxxx0_SWORRST 0x3C / Reset real time clock.#define CCxxx0_SNOP 0x3D / No operation. May be used to pad s

18、trobe commands to two / INT8Us for simpler software.#define CCxxx0_PARTNUM 0x30#define CCxxx0_VERSION 0x31#define CCxxx0_FREQEST 0x32#define CCxxx0_LQI 0x33#define CCxxx0_RSSI 0x34#define CCxxx0_MARCSTATE 0x35#define CCxxx0_WORTIME1 0x36#define CCxxx0_WORTIME0 0x37#define CCxxx0_PKTSTATUS 0x38#defin

19、e CCxxx0_VCO_VC_DAC 0x39#define CCxxx0_TXBYTES 0x3A#define CCxxx0_RXBYTES 0x3B#define CCxxx0_PATABLE 0x3E#define CCxxx0_TXFIFO 0x3F#define CCxxx0_RXFIFO 0x3F/ RF_SETTINGS is a data structure which contains all relevant CCxxx0 registerstypedef struct S_RF_SETTINGSINT8U FSCTRL2;/自已加的 INT8U FSCTRL1; /

20、Frequency synthesizer control. INT8U FSCTRL0; / Frequency synthesizer control. INT8U FREQ2; / Frequency control word, high INT8U. INT8U FREQ1; / Frequency control word, middle INT8U. INT8U FREQ0; / Frequency control word, low INT8U. INT8U MDMCFG4; / Modem configuration. INT8U MDMCFG3; / Modem config

21、uration. INT8U MDMCFG2; / Modem configuration. INT8U MDMCFG1; / Modem configuration. INT8U MDMCFG0; / Modem configuration. INT8U CHANNR; / Channel number. INT8U DEVIATN; / Modem deviation setting (when FSK modulation is enabled). INT8U FREND1; / Front end RX configuration. INT8U FREND0; / Front end

22、RX configuration. INT8U MCSM0; / Main Radio Control State Machine configuration. INT8U FOCCFG; / Frequency Offset Compensation Configuration. INT8U BSCFG; / Bit synchronization Configuration. INT8U AGCCTRL2; / AGC control.INT8U AGCCTRL1; / AGC control. INT8U AGCCTRL0; / AGC control. INT8U FSCAL3; /

23、Frequency synthesizer calibration. INT8U FSCAL2; / Frequency synthesizer calibration.INT8U FSCAL1; / Frequency synthesizer calibration. INT8U FSCAL0; / Frequency synthesizer calibration. INT8U FSTEST; / Frequency synthesizer calibration control INT8U TEST2; / Various test settings. INT8U TEST1; / Va

24、rious test settings. INT8U TEST0; / Various test settings. INT8U IOCFG2; / GDO2 output pin configuration INT8U IOCFG0; / GDO0 output pin configuration INT8U PKTCTRL1; / Packet automation control. INT8U PKTCTRL0; / Packet automation control. INT8U ADDR; / Device address. INT8U PKTLEN; / Packet length

25、. RF_SETTINGS;/const RF_SETTINGS rfSettings = 0x00, 0x08, / FSCTRL1 Frequency synthesizer control. 0x00, / FSCTRL0 Frequency synthesizer control. 0x10, / FREQ2 Frequency control word, high byte. 0xA7, / FREQ1 Frequency control word, middle byte. 0x62, / FREQ0 Frequency control word, low byte. 0x5B,

26、/ MDMCFG4 Modem configuration. 0xF8, / MDMCFG3 Modem configuration. 0x03, / MDMCFG2 Modem configuration. 0x22, / MDMCFG1 Modem configuration. 0xF8, / MDMCFG0 Modem configuration. 0x00, / CHANNR Channel number. 0x47, / DEVIATN Modem deviation setting (when FSK modulation is enabled). 0xB6, / FREND1 F

27、ront end RX configuration. 0x10, / FREND0 Front end RX configuration. 0x18, / MCSM0 Main Radio Control State Machine configuration. 0x1D, / FOCCFG Frequency Offset Compensation Configuration. 0x1C, / BSCFG Bit synchronization Configuration. 0xC7, / AGCCTRL2 AGC control. 0x00, / AGCCTRL1 AGC control.

28、 0xB2, / AGCCTRL0 AGC control. 0xEA, / FSCAL3 Frequency synthesizer calibration. 0x2A, / FSCAL2 Frequency synthesizer calibration. 0x00, / FSCAL1 Frequency synthesizer calibration. 0x11, / FSCAL0 Frequency synthesizer calibration. 0x59, / FSTEST Frequency synthesizer calibration. 0x81, / TEST2 Vario

29、us test settings. 0x35, / TEST1 Various test settings. 0x09, / TEST0 Various test settings. 0x0B, / IOCFG2 GDO2 output pin configuration. 0x06, / IOCFG0D GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation. 0x04, / PKTCTRL1 Packet automation co

30、ntrol. 0x05, / PKTCTRL0 Packet automation control. 0x00, / ADDR Device address. 0x0c / PKTLEN Packet length.;/*/函數(shù)名：delay(unsigned int s)/輸入：時(shí)間/輸出：無(wú)/功能描述：普通廷時(shí),內(nèi)部用/*static void delay(unsigned int s)unsigned int i;for(i=0; i<s; i+);for(i=0; i<s; i+);void halWait(INT16U timeout) do _nop_();_nop_(

31、);_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_(); while (-timeout);void SpiInit(void)CSN=0;SCK=0;CSN=1;/*/函數(shù)名：CpuInit()/輸入：無(wú)/輸出：無(wú)/功能描述：SPI初始化程序/*/void CpuInit(void)SpiInit();delay(5000);/*/函數(shù)名：SpisendByte(INT8U dat)/輸入：發(fā)送的數(shù)據(jù)/輸出：無(wú)/功能描述：SPI發(fā)送一個(gè)字

32、節(jié)/*INT8U SpiTxRxByte(INT8U dat)INT8U i,temp;temp = 0;SCK = 0;for(i=0; i<8; i+)if(dat & 0x80)MOSI = 1;else MOSI = 0;dat <<= 1;SCK = 1; _nop_();_nop_();temp <<= 1;if(MISO)temp+; SCK = 0;_nop_();_nop_();return temp;/*/函數(shù)名：void RESET_CC1100(void)/輸入：無(wú)/輸出：無(wú)/功能描述：復(fù)位CC1100/*void RESET_CC

33、1100(void) CSN = 0; while (MISO); SpiTxRxByte(CCxxx0_SRES); /寫(xiě)入復(fù)位命令while (MISO); CSN = 1; /*/函數(shù)名：void POWER_UP_RESET_CC1100(void) /輸入：無(wú)/輸出：無(wú)/功能描述：上電復(fù)位CC1100/*void POWER_UP_RESET_CC1100(void) CSN = 1; halWait(1); CSN = 0; halWait(1); CSN = 1; halWait(41); RESET_CC1100(); /復(fù)位CC1100/*/函數(shù)名：void halSpiWr

34、iteReg(INT8U addr, INT8U value)/輸入：地址和配置字/輸出：無(wú)/功能描述：SPI寫(xiě)寄存器/*void halSpiWriteReg(INT8U addr, INT8U value) CSN = 0; while (MISO); SpiTxRxByte(addr);/寫(xiě)地址 SpiTxRxByte(value);/寫(xiě)入配置 CSN = 1;/*/函數(shù)名：void halSpiWriteBurstReg(INT8U addr, INT8U *buffer, INT8U count)/輸入：地址，寫(xiě)入緩沖區(qū)，寫(xiě)入個(gè)數(shù)/輸出：無(wú)/功能描述：SPI連續(xù)寫(xiě)配置寄存器/*voi

35、d halSpiWriteBurstReg(INT8U addr, INT8U *buffer, INT8U count) INT8U i, temp;temp = addr | WRITE_BURST; CSN = 0; while (MISO); SpiTxRxByte(temp); for (i = 0; i < count; i+) SpiTxRxByte(bufferi); CSN = 1;/*/函數(shù)名：void halSpiStrobe(INT8U strobe)/輸入：命令/輸出：無(wú)/功能描述：SPI寫(xiě)命令/*void halSpiStrobe(INT8U strobe)

36、CSN = 0; while (MISO); SpiTxRxByte(strobe);/寫(xiě)入命令 CSN = 1;/*/函數(shù)名：INT8U halSpiReadReg(INT8U addr)/輸入：地址/輸出：該寄存器的配置字/功能描述：SPI讀寄存器/*INT8U halSpiReadReg(INT8U addr) INT8U temp, value; temp = addr|READ_SINGLE;/讀寄存器命令CSN = 0;while (MISO);SpiTxRxByte(temp);value = SpiTxRxByte(0);CSN = 1;return value;/*/函數(shù)名：

37、void halSpiReadBurstReg(INT8U addr, INT8U *buffer, INT8U count)/輸入：地址，讀出數(shù)據(jù)后暫存的緩沖區(qū)，讀出配置個(gè)數(shù)/輸出：無(wú)/功能描述：SPI連續(xù)寫(xiě)配置寄存器/*void halSpiReadBurstReg(INT8U addr, INT8U *buffer, INT8U count) INT8U i,temp;temp = addr | READ_BURST;/寫(xiě)入要讀的配置寄存器地址和讀命令 CSN = 0; while (MISO);SpiTxRxByte(temp); for (i = 0; i < count; i

38、+) bufferi = SpiTxRxByte(0); CSN = 1;/*/函數(shù)名：INT8U halSpiReadReg(INT8U addr)/輸入：地址/輸出：該狀態(tài)寄存器當(dāng)前值/功能描述：SPI讀狀態(tài)寄存器/*INT8U halSpiReadStatus(INT8U addr) INT8U value,temp;temp = addr | READ_BURST;/寫(xiě)入要讀的狀態(tài)寄存器的地址同時(shí)寫(xiě)入讀命令 CSN = 0; while (MISO); SpiTxRxByte(temp);value = SpiTxRxByte(0);CSN = 1;return value;/*/函數(shù)

39、名：void halRfWriteRfSettings(RF_SETTINGS *pRfSettings)/輸入：無(wú)/輸出：無(wú)/功能描述：配置CC1100的寄存器/*void halRfWriteRfSettings(void) halSpiWriteReg(CCxxx0_FSCTRL0, rfSettings.FSCTRL2);/自已加的 / Write register settings halSpiWriteReg(CCxxx0_FSCTRL1, rfSettings.FSCTRL1); halSpiWriteReg(CCxxx0_FSCTRL0, rfSettings.FSCTRL0)

40、; halSpiWriteReg(CCxxx0_FREQ2, rfSettings.FREQ2); halSpiWriteReg(CCxxx0_FREQ1, rfSettings.FREQ1); halSpiWriteReg(CCxxx0_FREQ0, rfSettings.FREQ0); halSpiWriteReg(CCxxx0_MDMCFG4, rfSettings.MDMCFG4); halSpiWriteReg(CCxxx0_MDMCFG3, rfSettings.MDMCFG3); halSpiWriteReg(CCxxx0_MDMCFG2, rfSettings.MDMCFG2); halSpiWriteReg(CCxxx0_MDMCFG1, rfSettings.MDMCFG1); halSpiWriteReg(CCxxx0_MDMCFG0, rfSettings.MDMCFG0); halSpiWriteReg(CCxxx0_CHANNR, rfSettings.CHANNR); halSpiWriteReg(CCxxx0_DEVIATN, rfSettings.DEVIATN); halSpiWriteReg(CCxxx0_FREND1, rfSetting