快速傅立葉變換FFT算法實(shí)驗(yàn)

1、. 快速傅立葉變換(FFT)算法實(shí)驗(yàn)實(shí)驗(yàn)?zāi)康模?. 加深對(duì)DFT 算法原理和基本性質(zhì)的理解；2. 熟悉FFT 的算法原理和FFT 子程序的算法流程和應(yīng)用；3. 學(xué)習(xí)用FFT 對(duì)連續(xù)信號(hào)和時(shí)域信號(hào)進(jìn)行頻譜分析的方法。程序流程圖:傅立葉變換是一種將信號(hào)從時(shí)域到頻域的變換形式，是聲學(xué)、語音、電信和信號(hào)處理等領(lǐng)域中的一種重要分析工具。離散傅立葉變換（DFT）是連續(xù)傅立葉變換在離散系統(tǒng)中的表現(xiàn)形式，由于DFT 的計(jì)算量很大，因此在很長時(shí)間內(nèi)其應(yīng)用受到很大的限制?？焖俑盗⑷~變換（FFT）是離散傅立葉變換的一種高效運(yùn)算方法。由于我們?cè)谟?jì)算DFT 時(shí)一次復(fù)數(shù)乘法需用四次實(shí)數(shù)乘法和二次實(shí)數(shù)加法；一次復(fù)數(shù)加法則需

2、二次實(shí)數(shù)加法。運(yùn)算一個(gè)X（k）需要4N 次復(fù)數(shù)乘法及2N+2（N-1）=2（2N-1）次實(shí)數(shù)加法。所以整個(gè)DFT運(yùn)算總共需要4N2 次實(shí)數(shù)乘法和N*2(2N-1)=2N(2N-1)次實(shí)數(shù)加法。如此一來，計(jì)算時(shí)乘法次數(shù)和加法次數(shù)都是和N2 成正比的，當(dāng)N 很大時(shí)，運(yùn)算量是可觀的，因而需要改進(jìn)對(duì)DFT 的算法減少運(yùn)算速度。我們可以將DFT 運(yùn)算中有些項(xiàng)合并。我們先設(shè)序列長度為N=2L，L 為整數(shù)。將N=2L 的序列x(n)(n=0,1,，N-1)，按N的奇偶分成兩組，也就是說我們將一個(gè)N 點(diǎn)的DFT 分解成兩個(gè)N/2 點(diǎn)的DFT，他們又重新組合成一個(gè)如下式所表達(dá)的N 點(diǎn)DFT：一般來說，輸入被假定

3、為連續(xù)的。當(dāng)輸入為純粹的實(shí)數(shù)的時(shí)候，我們就可以利用左右對(duì)稱的特性更好的計(jì)算DFT。這樣的RFFT 優(yōu)化算法是包裝算法：首先2N 點(diǎn)實(shí)數(shù)的連續(xù)輸入稱為“進(jìn)包”。其次N 點(diǎn)的FFT 被連續(xù)運(yùn)行。最后作為結(jié)果產(chǎn)生的N 點(diǎn)的合成輸出是“打開”成為最初的與DFT 相符合的2N 點(diǎn)輸入。使用這一思想，我們可以劃分FFT 的大小，它有一半花費(fèi)在包裝輸入O（N）的操作和打開輸出上。AD原理圖源程序*include<math.h>*include"DSP2833x_Device.h"/ DSP2833x Headerfile Include File*include"D

4、SP2833x_Examples.h"/ DSP2833x Examples Include Fi*include"comm.h"*include"i_cmplx.h"*include"ext_inf.h"/*/*if (CPU_FRQ_150MHZ) / Default - 150 MHz SYSCLKOUT*define ADC_MODCLK 0x3 / HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz*endif*if (CPU_FRQ_100MHZ)*de

5、fine ADC_MODCLK 0x2 / HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0 MHz*endif*define ADC_CKPS 0x1 / ADC module clock = HSPCLK/2*ADC_CKPS = 25.0MHz/(1*2) = 12.5MHz*define ADC_SHCLK 0xf / S/H width in ADC module periods = 16 ADC clocks*define AVG 1000 / Average sample limit*define ZOFFSET 0x00 /

6、 Average Zero offset*define BUF_SIZE 160 / Sample buffer size/*/unsignedint SampleLong;*define SAMPLELONG 3/unsignedint Ad_data1536=0;unsignedint Ad_data11536=0;unsignedint convcount = 0;volatileunsignedint adconvover =0;/int m=0;double n;double p,q;COMPLEX DDataBuffer512=0;Uint32 mod512;/unsignedin

7、t i;/*/ Prototype statements for functions found within this erruptvoidadc_isr(void);/*/voidmain(void)*if SAMPLELONG=1SampleLong =256;*endif*if SAMPLELONG=2SampleLong =512;*endif*if SAMPLELONG=3SampleLong =1024;*endif/ Step 1. Initialize System Control:/ PLL, WatchDog, enable Peripheral Cloc

8、ks/ This example function is found in the DSP2833x_SysCtrl.c file. InitSysCtrl();/ Step 2. Initialize GPIO:/ This example function is found in the DSP2833x_Gpio.c file and/ illustrates how to set the GPIO to it's default state. InitGpio(); / Skipped for this example/ Step 3. Clear all interrupts

9、 and initialize PIE vector table:/ Disable CPU interrupts DINT;/ Initialize the PIE control registers to their default state./ The default state is all PIE interrupts disabled and flags/ are cleared./ This function is found in the DSP2833x_PieCtrl.c file. InitPieCtrl();/ Disable CPU interrupts and c

10、lear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000;/ Initialize the PIE vector table with pointers to the shell Interrupt/ Service Routines (ISR)./ This will populate the entire table, even if the interrupt/ is not used in this example. This is useful for debug purposes./ The shell ISR routine

11、s are found in DSP2833x_DefaultIsr.c./ This function is found in DSP2833x_PieVect.c. InitPieVectTable();/ Interrupts that are used in this example are re-mapped to/ ISR functions found within this file. EALLOW; / This is needed to write to EALLOW protected register PieVectTable.ADCINT = &adc_isr

12、; EDIS; / This is needed to disable write to EALLOW protected registers/ Step 4. Initialize all the Device Peripherals:/ This function is found in DSP2833x_InitPeripherals.c/ InitPeripherals(); / Not required for this example InitAdc(); / For this example, init the ADC/ Step 5. User specific code, e

13、nable interrupts:/ Enable ADCINT in PIE PieCtrlRegs.PIEIER1.bit.INTx6 = 1; IER |= M_INT1; / Enable CPU Interrupt 1 EINT; / Enable Global interrupt INTM ERTM; / Enable Global realtime interrupt DBGM AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK; AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CKPS; AdcRegs.ADCTRL1.bit.S

14、EQ_CASC = 1; / 0 Non-Cascaded Mode; 1 Cascaded Mode AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 0x1; AdcRegs.ADCTRL2.bit.RST_SEQ1 = 0x1; AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x6; AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 15; AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 0x1 ; for(;)if (adconvover=1)for(i=0;i<(SampleLong/2);i+)DDa

15、taBufferi.real=Ad_data2*i; /short int DDataBufferi.imag=Ad_data2*i+1; /short intswitch(SampleLong)case 256:/*256 point*/ fft256(DDataBuffer,256); m=0;for(i=0;i<128;i+) p=DDataBufferi.real; q=DDataBufferi.imag; n=(long)p*(long)p+(long)q*(long)q; modm=sqrt(n); m+; break;case 512: /*512 point*/ fft5

16、12(DDataBuffer,512); m=0;for(i=0;i<256;i+) p=DDataBufferi.real; q=DDataBufferi.imag; n=(long)p*(long)p+(long)q*(long)q; modm=sqrt(n); m+; break;case 1024: /*1024 point*/ fft1024(DDataBuffer,1024); m=0;for(i=0;i<512;i+) p=DDataBufferi.real; q=DDataBufferi.imag; n=(long)p*(long)p+(long)q*(long)q; modm=sqrt(n); m+; break; adconvover=0; convcount =0; interruptvoidadc_isr(void)/ If 40 conversions have been logged, start overif(convcount = SampleLong) adconvover = 1; else Ad_dataconvcount = AdcRegs.ADCRESULT0 >>4; convcou