總線定義文檔

1、ISA 總線定義ISA 是 Industry Standard Architecture 的縮寫(xiě) 接口卡的外觀插槽的外觀引腳定義引腳定義方向說(shuō)明A1/I/O CH CKI/O channel check; active low=parity errorA2D7Data bit 7A3D6Data bit 6A4D5Data bit 5A5D4Data bit 4A6D3Data bit 3A7D2Data bit 2A8D1Data bit 1A9D0Data bit 0A10I/O CH RDYI/O Channel ready, pulled low to lengthen memory

2、cyclesA11AENAddress enable; active high when DMA controls busA12A19Address bit 19A13A18Address bit 18A14A17Address bit 17A15A16Address bit 16A16A15Address bit 15A17A14Address bit 14A18A13Address bit 13A19A12Address bit 12A20A11Address bit 11A21A10Address bit 10A22A9Address bit 9A23A8Address bit 8A24

3、A7Address bit 7A25A6Address bit 6A26A5Address bit 5A27A4Address bit 4A28A3Address bit 3A29A2Address bit 2A30A1Address bit 1A31A0Address bit 0B1GNDGroundB2RESETActive high to reset or initialize system logicB3+5V+5 VDCB4IRQ2Interrupt Request 2B5-5VDC-5 VDCB6DRQ2DMA Request 2B7-12VDC-12 VDCB8/NOWSNo W

4、aitStateB9+12VDC+12 VDCB10GNDGroundB11/SMEMWSystem Memory WriteB12/SMEMRSystem Memory ReadB13/IOWI/O WriteB14/IORI/O ReadB15/DACK3DMA Acknowledge 3B16DRQ3DMA Request 3B17/DACK1DMA Acknowledge 1B18DRQ1DMA Request 1B19/REFRESHRefreshB20CLOCKSystem Clock (67 ns, 8-8.33 MHz, 50% duty cycle)B21IRQ7Interr

5、upt Request 7B22IRQ6Interrupt Request 6B23IRQ5Interrupt Request 5B24IRQ4Interrupt Request 4B25IRQ3Interrupt Request 3B26/DACK2DMA Acknowledge 2B27T/CTerminal count; pulses high when DMA term. count reachedB28ALEAddress Latch EnableB29+5V+5 VDCB30OSCHigh-speed Clock (70 ns, 14.31818 MHz, 50% duty cyc

6、le) B31GNDGroundC1SBHESystem bus high enable (data available on SD8-15)C2LA23Address bit 23C3LA22Address bit 22C4LA21Address bit 21C5LA20Address bit 20C6LA18Address bit 19C7LA17Address bit 18C8LA16Address bit 17C9/MEMRMemory Read (Active on all memory read cycles)C10/MEMWMemory Write (Active on all

7、memory write cycles)C11SD08Data bit 8C12SD09Data bit 9C13SD10Data bit 10C14SD11Data bit 11C15SD12Data bit 12C16SD13Data bit 13C17SD14Data bit 14C18SD15Data bit 15D1/MEMCS16Memory 16-bit chip select (1 wait, 16-bit memory cycle)D2/IOCS16I/O 16-bit chip select (1 wait, 16-bit I/O cycle)D3IRQ10Interrup

8、t Request 10D4IRQ11Interrupt Request 11D5IRQ12Interrupt Request 12D6IRQ15Interrupt Request 15D7IRQ14Interrupt Request 14D8/DACK0DMA Acknowledge 0D9DRQ0DMA Request 0D10/DACK5DMA Acknowledge 5D11DRQ5DMA Request 5D12/DACK6DMA Acknowledge 6D13DRQ6DMA Request 6D14/DACK7DMA Acknowledge 7D15DRQ7DMA Request

9、 7D16+5 VD17/MASTERUsed with DRQ to gain control of systemD18GNDGroundEISA總線定義EISA 是 Extended Industry Standard Architecture 的縮寫(xiě)，由 Compaq, AST, Zenith, Tandy 等公司開(kāi)發(fā)。 接口卡的外觀+-+| 元件面 | |_ ISA-16bit _ ISA-8bit _| | | A1 正面/B1 反面 | | | | | | | | | | | | | | EISA: E1 正面/F1 反面 C1/D1 G1/H1A,C,E,G=元件面A,B,F,H

10、=線路面引腳定義PinNameDescriptionE1CMD#Command PhaseE2START#Start PhaseE3EXRDYEISA ReadyE4EX32#EISA Slave Size 32E5GNDGroundE6KEYAccess KeyE7EX16#EISA Slave Size 16E8SLBURST#Slave BurstE9MSBURST#Master BurstE10W/R#Write/ReadE11GNDGroundE12RESReservedE13RESReservedE14RESReservedE15GNDGroundE16KEYAccess KeyE

11、17BE1#Byte Enable 1E18LA31#Latchable Addressline 31E19GNDGroundE20LA30#Latchable Addressline 30E21LA28#Latchable Addressline 28E22LA27#Latchable Addressline 27E23LA25#Latchable Addressline 25E24GNDGroundE25KEYAccess KeyE26LA15Latchable Addressline 15E27LA13Latchable Addressline 13E28LA12Latchable Ad

12、dressline 12E29LA11Latchable Addressline 11E30GNDGroundE31LA9Latchable Addressline 9F1GNDGroundF2+5V+5 VDCF3+5V+5 VDCF4-F5-F6KEYAccess KeyF7-F8-F9+12V+12 VDCF10M/IO#Memory/Input-OutputF11LOCK#Lock busF12RESReservedF13GNDGroundF14RESReservedF15BE3#Byte Enable 3F16KEYAccess KeyF17BE2#Byte Enable 2F18B

13、E0#Byte Enable 0F19GNDGroundF20+5V+5 VDCF21LA29#Latchable Addressline 29F22GNDGroundF23LA26#Latchable Addressline 26F24LA24#Latchable Addressline 24F25KEYAccess KeyF26LA16Latchable Addressline 16F27LA14Latchable Addressline 14F28+5V+5 VDCF29+5V+5 VDCF30GNDGroundF31LA10Latchable Addressline 10G1LA7La

14、tchable Addressline 7G2GNDGroundG3LA4Latchable Addressline 4G4LA3Latchable Addressline 3G5GNDGroundG6KEYAccess KeyG7D17Data 17G8D19Data 19G9D20Data 20G10D22Data 22G11GNDGroundG12D25Data 25G13D26Data 26G14D28Data 28G15KEYAccess KeyG16GNDGroundG17D30Data 30G18D31Data 31G19MREQxMaster RequestH1LA8Latch

15、able Addressline 8H2LA6Latchable Addressline 6H3LA5Latchable Addressline 5H4+5V+5 VDCH5LA2Latchable Addressline 2H6KEYAccess KeyH7D16Data 16H8D18Data 18H9GNDGroundH10D21Data 21H11D23Data 23H12D24Data 24H13GNDGroundH14D27Data 27H15KEYAccess KeyH16D29Data 29H17+5V+5 VDCH18+5V+5 VDCVESA總線定義   

16、;  VESA 是 Video Electronics Standards Association 的縮寫(xiě)，本頁(yè)列出的是擴(kuò)展部分的引腳定義，非擴(kuò)展部分請(qǐng)見(jiàn) ISA 總線的定義。 接口卡的外觀插槽的外觀引腳定義PinNameDescriptionA1D1Data 1A2D3Data 3A3GNDGroundA4D5Data 5A5D7Data 7A6D9Data 9A7D11Data 11A8D13Data 13A9D15Data 15A10GNDGroundA11D17Data 17A12Vcc+5 VDCA13D19Data 19A14D21Data 21A15D23Data 23

17、A16D25Data 25A17GNDGroundA18D27Data 27A19D29Data 2A20D31Data 31A21A30Address 30A22A28Address 28A23A26Address 26A24GNDGroundA25A24Address 24A26A22Address 22A27VCC+5 VDCA28A20Address 20A29A18Address 18A30A16Address 16A31A14Address 14A32A12Address 12A33A10Address 10A34A8Address 8A35GNDGroundA36A6Addres

18、s 6A37A4Address 4A38WBACK#Write BackA39BE0#Byte Enable 0A40VCC+5 VDCA41BE1#Byte Enable 1A42BE2#Byte Enable 2A43GNDGroundA44BE3#Byte Enable 3A45ADS#Address StrobeA48LRDY#Local ReadyA49LDEVLocal DeviceA50LREQLocal RequestA51GNDGroundA52LGNTLocal GrantA53VCC+5 VDCA54ID2Identification 2A55ID3Identificat

19、ion 3A56ID4Identification 4A57LKEN#A58LEADS#Local Enable Address StrobeB1D0Data 0B2D2Data 2B3D4Data 4B4D6Data 6B5D8Data 8B6GNDGroundB7D10Data 10B8D12Data 12B9VCC+5 VDCB10D14Data 14B11D16Data 16B12D18Data 18B13D20Data 20B14GNDGroundB15D22Data 22B16D24Data 24B17D26Data 26B18D28Data 28B19D30Data 30B20V

20、CC+5 VDCB21A31Address 31B22GNDGroundB23A29Address 29B24A27Address 27B25A25Address 25B26A23Address 23B27A21Address 21B28A19Address 19B29GNDGroundB30A17Address 17B31A15Address 15B32VCC+5 VDCB33A13Address 13B34A11Address 11B35A9Address 9B36A7Address 7B37A5Address 5B38GNDGroundB39A3Address 3B40A2Address

21、 2B41n/cNot connectedB42RESET#ResetB43DC#Data/CommandB44M/IO#Memory/IOB45W/R#Write/ReadB48RDYRTN#Ready ReturnB49GNDGroundB50IRQ9Interrupt 9B51BRDY#Burst ReadyB52BLAST#Burst LastB53ID0Identification 0B54ID1Identification 1B55GNDGroundB56LCLKLocal ClockB57VCC+5 VDCB58LBS16#Local Bus Size 16PCI總線定義 PCI

22、 是 Peripheral Component Interconnect 的縮寫(xiě) 接口卡的外觀PCI 標(biāo)準(zhǔn) 32位/64位 接口卡 -| PCI 元件側(cè) （B面） | | | | _ 32 位引腳部分 64 位引腳部分 _|_| |-|-|-| b01 b11 b14 b49 b52 b62 b63 b94PCI 5V 32/64位卡| optional | _ 32 位引腳部分 64 位引腳部分 _|_| |-|-|PCI 3.3V 32/64位卡| optional | _ 32 位引腳部分 64 位引腳部分 _|_| |-|-|引腳定義 Pin+5V+3.3VUniversalDescr

23、iptionA1TRSTTest Logic ResetA2+12V+12 VDCA3TMSTest Mde SelectA4TDITest Data InputA5+5V+5 VDCA6INTAInterrupt AA7INTCInterrupt CA8+5V+5 VDCA9RESV01Reserved VDCA10+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)A11RESV03Reserved VDCA12GND03(OPEN)(OPEN)Ground or Open (Key)A13GND05(OPEN)(OPEN)Ground or Open (K

24、ey)A14RESV05Reserved VDCA15RESETResetA16+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)A17GNTGrant PCI useA18GND08GroundA19RESV06Reserved VDCA20AD30Address/Data 30A21+3.3V01+3.3 VDCA22AD28Address/Data 28A23AD26Address/Data 26A24GND10GroundA25AD24Address/Data 24A26IDSELInitialization Device SelectA27+3.3V

25、03+3.3 VDCA28AD22Address/Data 22A29AD20Address/Data 20A30GND12GroundA31AD18Address/Data 18A32AD16Address/Data 16A33+3.3V05+3.3 VDCA34FRAMEAddress or Data phaseA35GND14GroundA36TRDYTarget ReadyA37GND15GroundA38STOPStop Transfer CycleA39+3.3V07+3.3 VDCA40SDONESnoop DoneA41SBOSnoop BackoffA42GND17Groun

26、dA43PARParityA44AD15Address/Data 15A45+3.3V10+3.3 VDCA46AD13Address/Data 13A47AD11Address/Data 11A48GND19GroundA49AD9Address/Data 9A52C/BE0Command, Byte Enable 0A53+3.3V11+3.3 VDCA54AD6Address/Data 6A55AD4Address/Data 4A56GND21GroundA57AD2Address/Data 2A58AD0Address/Data 0A59+5V+3.3VSignal Rail+V I/

27、O (+5 V or +3.3 V)A60REQ64Request 64 bit ?A61VCC11+5 VDCA62VCC13+5 VDCA63GNDGroundA64C/BE7#Command, Byte Enable 7A65C/BE5#Command, Byte Enable 5A66+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)A67PAR64Parity 64 ?A68AD62Address/Data 62A69GNDGroundA70AD60Address/Data 60A71AD58Address/Data 58A72GNDGroundA7

28、3AD56Address/Data 56A74AD54Address/Data 54A75+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)A76AD52Address/Data 52A77AD50Address/Data 50A78GNDGroundA79AD48Address/Data 48A80AD46Address/Data 46A81GNDGroundA82AD44Address/Data 44A83AD42Address/Data 42A84+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)A85AD40Addre

29、ss/Data 40A86AD38Address/Data 38A87GNDGroundA88AD36Address/Data 36A89AD34Address/Data 34A90GNDGroundA91AD32Address/Data 32A92RESReservedA93GNDGroundA94RESReservedB1-12V-12 VDCB2TCKTest ClockB3GNDGroundB4TDOTest Data OutputB5+5V+5 VDCB6+5V+5 VDCB7INTBInterrupt BB8INTDInterrupt DB9PRSNT1ReservedB10RES

30、+V I/O (+5 V or +3.3 V)B11PRSNT2?B12GND(OPEN)(OPEN)Ground or Open (Key)B13GND(OPEN)(OPEN)Ground or Open (Key)B14RESReserved VDCB15GNDResetB16CLKClockB17GNDGroundB18REQRequestB19+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)B20AD31Address/Data 31B21AD29Address/Data 29B22GNDGroundB23AD27Address/Data 27B24

31、AD25Address/Data 25B25+3.3V+3.3VDCB26C/BE3Command, Byte Enable 3B27AD23Address/Data 23B28GNDGroundB29AD21Address/Data 21B30AD19Address/Data 19B31+3.3V+3.3 VDCB32AD17Address/Data 17B33C/BE2Command, Byte Enable 2B34GND13GroundB35IRDYInitiator ReadyB36+3.3V06+3.3 VDCB37DEVSELDevice SelectB38GND16Ground

32、B39LOCKLock busB40PERRParity ErrorB41+3.3V08+3.3 VDCB42SERRSystem ErrorB43+3.3V09+3.3 VDCB44C/BE1Command, Byte Enable 1B45AD14Address/Data 14B46GND18GroundB47AD12Address/Data 12B48AD10Address/Data 10B49GND20GroundB50(OPEN)GND(OPEN)Ground or Open (Key)B51(OPEN)GND(OPEN)Ground or Open (Key)B52AD8Addre

33、ss/Data 8B53AD7Address/Data 7B54+3.3V12+3.3 VDCB55AD5Address/Data 5B56AD3Address/Data 3B57GND22GroundB58AD1Address/Data 1B59VCC08+5 VDCB60ACK64Acknowledge 64 bit ?B61VCC10+5 VDCB62VCC12+5 VDCB63RESReservedB64GNDGroundB65C/BE6#Command, Byte Enable 6B66C/BE4#Command, Byte Enable 4B67GNDGroundB68AD63Ad

34、dress/Data 63B69AD61Address/Data 61B70+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)B71AD59Address/Data 59B72AD57Address/Data 57B73GNDGroundB74AD55Address/Data 55B75AD53Address/Data 53B76GNDGroundB77AD51Address/Data 51B78AD49Address/Data 49B79+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)B80AD47Address/Data

35、 47B81AD45Address/Data 45B82GNDGroundB83AD43Address/Data 43B84AD41Address/Data 41B85GNDGroundB86AD39Address/Data 39B87AD37Address/Data 37B88+5V+3.3VSignal Rail+V I/O (+5 V or +3.3 V)B89AD35Address/Data 35B90AD33Address/Data 33B91GNDGroundB92RESReservedB93RESReservedB94GNDGroundAGP總線定義  

36、60; AGP 是 Accelerated Graphics Port，是 Intel 推出的一種 3D 圖形標(biāo)準(zhǔn)接口，它能夠提供四倍于 PCI 的效率，AGP2X 的傳輸速率達(dá)到 533MB。有關(guān) AGP 的說(shuō)明可以在 Intel 的網(wǎng)站上找到。 引腳定義PinB面A面1Spare12V25.0VSpare35.0VReserved4USB+USB-5GroundGround6INTB#INTA#7ClockRST#8REQ#GNT#9Vcc3.3VVcc3.3V10ST0ST111ST2Reserved12RBF#PIPE#13GroundGround14SpareSpare15SBA0S

37、BA116Vcc3.3VVcc3.3V17SBA2SBA318SB_STBReserved19GroundGround20SBA4SBA521SBA6SBA722KeyKey23KeyKey24KeyKey25KeyKey26Address31Address3027Address29Address2828Vcc3.3VVcc3.3V29Address27Address2630Address25Address2431GroundGround32AD_STB1Reserved33Address23C/BE3#34Vddq3.3Vddq3.335Address21Address2236Address

38、19Address2037GroundGround38Address17Address1839C/BE2#Address1640Vddq3.3Vddq3.341IRDY#FRAME#4243GroundGround4445Vcc3.3VVcc3.3V46DEVSEL#TRDY#47Vddq3.3STOP#48Perr#Spare49GroundGround50SERR#PAR51C/BE1#Address1552Vddq3.3Vddq3.353Address14Address1354Address12Address1155GroundGround56Address10Address957Add

39、ress8C/BE0#58Vddq3.3Vddq3.359AD_STB0Reserved60Address7Address661GroundGround62Address5Address463Address3Address264Vddq3.3Vddq3.365Address1Address066SMB0SMB1PCMCIA引腳定義    PCMCIA 是 Personal Computer Memory Card International AssociationIndustry Standard Architecture 的縮寫(xiě)，是便攜式計(jì)算機(jī)外擴(kuò)卡的接口定義。

40、 引腳定義PinNameDirDescription1GNDGround2D3Data 33D4Data 44D5Data 55D6Data 66D7Data 77/CE1Card Enable 18A10Address 109/OEOutput Enable10A11Address 1111A9Address 912A8Address 813A13Address 1314A14Address 1415/WE:/PWrite Enable : Program16/READY:/IREQReady : Busy (IREQ)17VCC+5V18VPP1Programming Voltage (EPROM)19A16Address 1620A15Address