NRF24L01收發(fā)程序

1、NRF24L01收發(fā)程序包含 nrf24L01 頭文件如下 :#include <iom16v.h>#include <macros.h>#include "12864.h"/-/spi標(biāo)志#define DDR_SPI DDRB#define DD_MOSI 5#define DD_MISO 6#define DD_SCK 7#define DD_SS 4#define CE PB3#define IRQ PB2/-NRF24L01- /-接口定義 -/#define NRF24L01_MISO PB6 /輸入 0#define Hign_24L0

2、1_MISO PORTB|=(1 << PB6) #define Low_24L01_MISO PORTB &= (1 << PB6) #define Read_24L01_MISO PINB & (1 << PB6)/#define NRF24L01_MOSI PB5 /輸出 1#define Hign_24L01_MOSI PORTB |= (1 << PB5) #define Low_24L01_MOSI PORTB &= (1 << PB5) #define Read_24L01_MOSI PINB &

3、amp; (1 << PB5)/#define NRF24L01_SCK PB7 /輸出 1#define Hign_24L01_SCK PORTB |= (1 << PB7) #define Low_24L01_SCK PORTB &= (1 << PB7) #define Read_24L01_SCK PINB & (1 << PB7);/#define NRF24L01_CSN PB4 /輸出 1#define Low_24L01_CSN PORTB &= (1 << PB4) #define Hign_

4、24L01_CSN PORTB |= (1 << PB4)/#define NRF24L01_CE PB3 /輸出 1#define Hign_24L01_CE PORTB |= (1 << PB3) #define Low_24L01_CE PORTB &= (1 << PB3) #define Read_24L01_CE PINB & (1 << PB3)/*NRF24L01*#define TX_ADR_WIDTH 5 /發(fā)送地址長度，最大長度為5 5*8=40 bit#define RX_ADR_WIDTH 5 /接收地址

5、長度#define TX_PLOAD_WIDTH 32 / 發(fā)送字節(jié)長度，#define RX_PLOAD_WIDTH 32 / 接收字節(jié)長度uchar TX_ADDRESSTX_ADR_WIDTH=0x34,0x43,0x10,0x10,0x01; / 發(fā)送地址uchar RX_ADDRESSRX_ADR_WIDTH=0x34,0x43,0x10,0x10,0x01; / 接收地址 /*NRF24L01寄存器指令*#define READ_REG 0x00 /讀寄存器指令#define WRITE_REG 0x20 /寫寄存器指令#define RD_RX_PLOAD 0x61 /讀取接收數(shù)

6、據(jù)指令#define WR_TX_PLOAD 0xA0 / 寫待發(fā)數(shù)據(jù)指令#define FLUSH_TX 0xE1 /沖洗發(fā)送FIFO指令#define FLUSH_RX 0xE2 /沖洗接收FIFO指令#define REUSE_TX_PL 0xE3 / 定義重復(fù)裝載數(shù)據(jù)指令 #define NOP 0xFF / 保留/*SPI(nRF24L01)寄存器地址*#define CONFIG 0x00 /配置收發(fā)狀態(tài)，CRC校驗(yàn)?zāi)Ｊ揭约笆瞻l(fā)狀態(tài)響應(yīng)方式#define EN_AA 0x01 /自動應(yīng)答功能設(shè)置#define EN_RXADDR 0x02 /可用信道設(shè)置#define SETUP_

7、AW 0x03 / 收發(fā)地址寬度設(shè)置#define SETUP_RETR 0x04 /自動重發(fā)功能設(shè)置#define RF_CH 0x05 /工作頻率設(shè)置#define RF_SETUP 0x06 / 發(fā)射速率、功耗功能設(shè)置 #define STATUS 0x07/ 狀態(tài)寄存器#define OBSERVE_TX 0x08 /發(fā)送監(jiān)測功能#define CD 0x09 /地址檢測 #define RX_ADDR_P0 0x0A /頻道 0 接收數(shù)據(jù)地址#define RX_ADDR_P1 0x0B /頻道 1 接收數(shù)據(jù)地址#define RX_ADDR_P2 0x0C /頻道 2 接收數(shù)據(jù)地址

8、#define RX_ADDR_P3 0x0D /頻道 3 接收數(shù)據(jù)地址#define RX_ADDR_P4 0x0E /頻道 4 接收數(shù)據(jù)地址#define RX_ADDR_P5 0x0F /頻道5 接收數(shù)據(jù)地址#define TX_ADDR 0x10 /發(fā)送地址寄存器#define RX_PW_P0 0x11 /接收頻道0 接收數(shù)據(jù)長度#define RX_PW_P10x12 /接收頻道0 接收數(shù)據(jù)長度#define RX_PW_P2 0x13 /接收頻道0 接收數(shù)據(jù)長度#define RX_PW_P3 0x14 /接收頻道0 接收數(shù)據(jù)長度#define RX_PW_P40x15 /接收頻

9、道0 接收數(shù)據(jù)長度#define RX_PW_P5 0x16 /接收頻道0 接收數(shù)據(jù)長度 #define FIFO_STATUS 0x17 / FIFO棧入棧出狀態(tài)寄存器設(shè)置/*/*/* void spi_init()初始化 SPI/* void spi_init()Hign_24L01_CSN;DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(1<<DD_SS)|(1 << CE);/ 設(shè)置MOSI,SCK,SS.CE為 OUTPUT,其它為 INPUTDDR_SPI&=(1<<DD_MISO)|(1&

10、lt;<IRQ);SPCR=(1<<SPE)|(1<<MSTR)|(1<<SPR0);/使能 SPI 接口 , 主機(jī)模式 ,MSB低位在前 , 模式 0,16分頻 ,SPI 時(shí)鐘 1MHZSPSR=0;/* /* ucharSPI_RW(uchar date)讀寫 SPI/* uchar SPI_RW(uchar date)SPDR=date;while(!(SPSR&(1<<SPIF);return SPDR;/* /*ucharSPI_Read(uchar reg)讀 24L01 寄存器/* ucharSPI_Read(ucha

11、r reg)uchar reg_val;Low_24L01_CSN;SPI_RW(reg);reg_val = SPI_RW(0);Hign_24L01_CSN;return(reg_val);/* /* ucharSPI_RW_Reg(uchar reg, uchar value) /寫 24L01 寄存器/*uchar SPI_RW_Reg(uchar reg, uchar value)uchar status;Low_24L01_CSN;status = SPI_RW(reg);SPI_RW(value);Hign_24L01_CSN;return(status);/* /* uchar

12、 SPI_Read_Buf(uchar reg, uchar *pBuf, uchar bites)/ 讀 24L01 寄存器 BUFF /* ucharSPI_Read_Buf(uchar reg, uchar *pBuf, uchar bites) uint status1,uchar_ctr;Low_24L01_CSN;status1 = SPI_RW(reg);for(uchar_ctr=0;uchar_ctr<bites;uchar_ctr+)pBufuchar_ctr = SPI_RW(0);Hign_24L01_CSN;return(status1);/* /* uchar

13、 SPI_Write_Buf(uchar reg, uchar *pBuf, uchar bites)/寫 24L01 寄存器 BUFF/* uchar SPI_Write_Buf(uchar reg, uchar *pBuf, uchar bites) uchar status1,uchar_ctr;Low_24L01_CSN; /SPI 使能status1 = SPI_RW(reg);for(uchar_ctr=0; uchar_ctr<bites; uchar_ctr+) /SPI_RW(*pBuf+);Hign_24L01_CSN; / 關(guān)閉 SPIreturn(status1)

14、; /* /* void SetRX_Mode(void)/ 接收模式設(shè)置/* void SetRX_Mode(void)Low_24L01_CE;SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH); /寫接收地址SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); /0通道自動應(yīng)答SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);數(shù)/據(jù)通道 0SPI_RW_Reg(WRITE_REG + RF_CH,0); /射頻通道SPI_RW_Reg(WRITE_REG + RX

15、_PW_P0, RX_PLOAD_WIDTH);/寫通道 0 接受數(shù)據(jù)長度SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); /0db 1MSPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); /接收模式Hign_24L01_CE; / 開始接收delayus(200);/注意不能太小/* /* ucharnRF24L01_RxPacket(uchar* rx_buf) /接收數(shù)據(jù)包/* uchar nRF24L01_RxPacket(uchar* rx_buf)uchar sta,flag=0;sta=SPI_Read(STATUS); /讀

16、取狀態(tài)寄存其來判斷數(shù)據(jù)接收狀況if(sta&0x40) /判斷是否接收到數(shù)據(jù)RX_DR=1?Low_24L01_CE; / StandBy I模式SPI_Read_Buf(RD_RX_PLOAD,rx_buf,TX_PLOAD_WIDTH);/ read receive payloadfrom RX_FIFO bufferflag =1; /讀取數(shù)據(jù)完成標(biāo)志SPI_RW_Reg(WRITE_REG+STATUS,sta); 接/收到數(shù)據(jù)后 RX_DR,TX_DS,MAX_PT都置高為 1，通過寫 1 來清楚中斷標(biāo)志return (flag);/*/* void nRF24L01_TxP

17、acket(uchar * tx_buf) /* voidnRF24L01_TxPacket( uchar * tx_buf) uchar sta=0;uchar flag=0;發(fā)送數(shù)據(jù)包Low_24L01_CE; /StandBy I模式SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH);SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); /裝載接收端地址SPI_Write_Buf(WR_TX_PLOAD, tx_buf, TX_PLOAD_WI

18、DTH); /裝載數(shù)據(jù)SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); /SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); /SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1f); /500+86usSPI_RW_Reg(WRITE_REG + RF_CH, 0); /SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); /SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); / IRQ收發(fā)完成中斷響應(yīng)， 16 位CRC，主發(fā)送delayms(2);Hign_24L01_CE; / 置高 CE，激發(fā)數(shù)據(jù)發(fā)送delayus(10);Low